公开(公告)号：US20240004786A1

公开(公告)日：2024-01-04

申请号：US17855157

申请日：2022-06-30

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： VIGNESH ADHINARAYANAN ,  MAHZABEEN ISLAM ,  JAGADISH B. KOTRA ,  SERGEY BLAGODUROV

IPC: G06F3/06

CPC classification number: G06F3/0647 ,  G06F3/0604 ,  G06F3/0683

Abstract: Allocating memory for processing-in-memory (PIM) devices, including: allocating, in a first Dynamic Random Access Memory (DRAM) sub-array, a first data structure beginning in a first grain of the DRAM; allocating, in a second DRAM sub-array, a second data structure beginning in a second grain of the DRAM; and wherein the second DRAM sub-array is different from the first DRAM sub-array and the second grain is different from the first grain.

公开(公告)号：US20220342786A1

公开(公告)日：2022-10-27

申请号：US17861435

申请日：2022-07-11

Applicant: Advanced Micro Devices, Inc.

Inventor： SERGEY BLAGODUROV ,  JINYOUNG CHOI

IPC: G06F11/30 ,  G06F11/07 ,  G06F11/34

Abstract: An approach is provided for implementing memory profiling aggregation. A hardware aggregator provides memory profiling aggregation by controlling the execution of a plurality of hardware profilers that monitor memory performance in a system. For each hardware profiler of the plurality of hardware profilers, a hardware counter value is compared to a threshold value. When a threshold value is satisfied, execution of a respective hardware profiler of the plurality of hardware profilers is initiated to monitor memory performance. Multiple hardware profilers of the plurality of hardware profilers may execute concurrently and each generate a result counter value. The result counter values generated by each hardware profiler of the plurality of hardware profilers are aggregated to generate an aggregate result counter value. The aggregate result counter value is stored in memory that is accessible by a software processes for use in optimizing memory-management policy decisions.

公开(公告)号：US20210351787A1

公开(公告)日：2021-11-11

申请号：US16869207

申请日：2020-05-07

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ONUR KAYIRAN ,  STEVEN RAASCH ,  SERGEY BLAGODUROV ,  JAGADISH B. KOTRA

IPC: H03M7/30 ,  H04L27/18

Abstract: Temporal link encoding, including: identifying a data type of a data value to be transmitted; determining that the data type is included in one or more data types for temporal encoding; and transmitting the data value using temporal encoding.

公开(公告)号：US20220197768A1

公开(公告)日：2022-06-23

申请号：US17130665

申请日：2020-12-22

Applicant: Advanced Micro Devices, Inc.

Inventor： SERGEY BLAGODUROV ,  JINYOUNG CHOI

IPC: G06F11/30 ,  G06F11/34 ,  G06F11/07

Abstract: An approach is provided for implementing memory profiling aggregation. A hardware aggregator provides memory profiling aggregation by controlling the execution of a plurality of hardware profilers that monitor memory performance in a system. For each hardware profiler of the plurality of hardware profilers, a hardware counter value is compared to a threshold value. When a threshold value is satisfied, execution of a respective hardware profiler of the plurality of hardware profilers is initiated to monitor memory performance. Multiple hardware profilers of the plurality of hardware profilers may execute concurrently and each generate a result counter value. The result counter values generated by each hardware profiler of the plurality of hardware profilers are aggregated to generate an aggregate result counter value. The aggregate result counter value is stored in memory that is accessible by a software processes for use in optimizing memory-management policy decisions.

公开(公告)号：US20220027291A1

公开(公告)日：2022-01-27

申请号：US16938364

申请日：2020-07-24

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： SERGEY BLAGODUROV ,  JOHNATHAN ALSOP ,  JAGADISH B. KOTRA ,  MARKO SCRBAK ,  GANESH DASIKA

IPC: G06F13/16 ,  G06F9/30 ,  H04L12/733

Abstract: Arbitrating atomic memory operations, including: receiving, by a media controller, a plurality of atomic memory operations; determining, by an atomics controller associated with the media controller, based on one or more arbitration rules, an ordering for issuing the plurality of atomic memory operations; and issuing the plurality of atomic memory operations to a memory module according to the ordering.

公开(公告)号：US20220027158A1

公开(公告)日：2022-01-27

申请号：US16937189

申请日：2020-07-23

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： GANESH DASIKA ,  SERGEY BLAGODUROV ,  SEYEDMOHAMMAD SEYEDZADEHDELCHEH

IPC: G06F9/34 ,  G06F9/30

Abstract: Compacted addressing for transaction layer packets, including: determining, for a first epoch, one or more low entropy address bits in a plurality of first transaction layer packets; removing, from one or more memory addresses of one or more second transaction layer packets, the one or more low entropy address bits; and sending the one or more second transaction layer packets.