公开(公告)号：US11418797B2

公开(公告)日：2022-08-16

申请号：US16368269

申请日：2019-03-28

Applicant: Advanced Micro Devices, Inc.

Inventor： Adam H. Li ,  Nathaniel David Naegle

IPC: H04N19/176 ,  H04N13/395 ,  H04N19/167 ,  H04N19/179 ,  H04N19/59

Abstract: Systems, apparatuses, and methods for performing efficient video transmission are disclosed. In a video processing system, a transmitter identifies multiple planes in a scene. The transmitter renders and compresses each of the multiple planes with a combination of a corresponding compression level and a resolution, which is different from a combination of compression level and resolution of any other plane. For each plane, the transmitter inserts, in multi-plane information, data such as identification of the plane, a location in the video frame for the plane, and one or more of a resolution and compression level for the plane. The transmitter conveys the rendered and compressed planes along with the multi-plane information to a receiver. The receiver decodes each of the planes and insets each of the planes on any lower resolution planes of the multiple planes.

公开(公告)号：US20200314436A1

公开(公告)日：2020-10-01

申请号：US16368269

申请日：2019-03-28

Applicant: Advanced Micro Devices, Inc.

Inventor： Adam H. Li ,  Nathaniel David Naegle

IPC: H04N19/176 ,  H04N13/395 ,  H04N19/59 ,  H04N19/179 ,  H04N19/167

Abstract: Systems, apparatuses, and methods for performing efficient video transmission are disclosed. In a video processing system, a transmitter identifies multiple planes in a scene. The transmitter renders and compresses each of the multiple planes with a combination of a corresponding compression level and a resolution, which is different from a combination of compression level and resolution of any other plane. For each plane, the transmitter inserts, in multi-plane information, data such as identification of the plane, a location in the video frame for the plane, and one or more of a resolution and compression level for the plane. The transmitter conveys the rendered and compressed planes along with the multi-plane information to a receiver. The receiver decodes each of the planes and insets each of the planes on any lower resolution planes of the multiple planes.

公开(公告)号：US12052472B2

公开(公告)日：2024-07-30

申请号：US17032983

申请日：2020-09-25

Applicant: Advanced Micro Devices, Inc.

Inventor： Adam H. Li ,  Eugene Kuznetsov ,  Girish P. Subramaniam ,  Jihyuk Choi

IPC: H04N21/472 ,  H04N19/42 ,  H04N21/2343 ,  H04N21/4363 ,  H04N21/6379

CPC classification number: H04N21/47217 ,  H04N19/42 ,  H04N21/234381 ,  H04N21/43637 ,  H04N21/6379

Abstract: Techniques are provided herein for processing video data. The techniques include identifying one or more input factors including one or more of signal quality factors, video content complexity factors, and hardware buffering factors for one or more of a video encoding system and a video playback system; evaluating the one or more input factors to determine adjustments to apply to one or both of the video encoding system and the video playback system; and applying the determine adjustments to the one or both of the video encoding system and the video playback system.

公开(公告)号：US20200314434A1

公开(公告)日：2020-10-01

申请号：US16368293

申请日：2019-03-28

Applicant: Advanced Micro Devices, Inc.

Inventor： Adam H. Li ,  Nathaniel David Naegle

IPC: H04N19/167 ,  H04N19/176 ,  H04N19/196 ,  H04N19/124

Abstract: Systems, apparatuses, and methods for performing efficient video compression are disclosed. A video processing system includes a transmitter sending a video stream over a wireless link to a receiver. The transmitter includes a processor and an encoder. The processor generates rendered blocks of pixels of a video frame, and when the processor predicts a compression level for a given region of the video frame is different from a compression level for immediately neighboring blocks, the processor generates side information. The side information identifies a location of the given region in the video frame and a type of content that causes the compression level differences. The processor sends the rendered video information and the side information as accompanying metadata to the encoder. The encoder updates encoding parameters based on the received side information, and compresses the rendered given region based on the updated encoding parameters.

公开(公告)号：US20200252611A1

公开(公告)日：2020-08-06

申请号：US16263630

申请日：2019-01-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Adam H. Li

IPC: H04N19/124 ,  H04N19/146 ,  H04N19/137 ,  H04N19/176

Abstract: Systems, apparatuses, and methods for performing efficient bitrate control of video compression are disclosed. Logic in a bitrate controller of a video encoder receives a target block bitstream length for a block of pixels of a video frame. When the logic determines a count of previously compressed blocks does not exceed a count threshold, the logic selects a quantization parameter from a full range of available quantization parameters. After encoding the block, the logic determines a parameter based on a first ratio of the achieved block bitstream length to an exponential value of an actual quantization parameter used to generate the achieved block bitstream length. For another block, when the count exceeds the count threshold, the logic generates a quantization parameter based on a ratio of the target block bitstream length to an average of parameters of previously encoded blocks.

公开(公告)号：US10951892B2

公开(公告)日：2021-03-16

申请号：US16263630

申请日：2019-01-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Adam H. Li

IPC: H04N19/124 ,  H04N19/176 ,  H04N19/137 ,  H04N19/146

Abstract: Systems, apparatuses, and methods for performing efficient bitrate control of video compression are disclosed. Logic in a bitrate controller of a video encoder receives a target block bitstream length for a block of pixels of a video frame. When the logic determines a count of previously compressed blocks does not exceed a count threshold, the logic selects a quantization parameter from a full range of available quantization parameters. After encoding the block, the logic determines a parameter based on a first ratio of the achieved block bitstream length to an exponential value of an actual quantization parameter used to generate the achieved block bitstream length. For another block, when the count exceeds the count threshold, the logic generates a quantization parameter based on a ratio of the target block bitstream length to an average of parameters of previously encoded blocks.

公开(公告)号：US20240211762A1

公开(公告)日：2024-06-27

申请号：US18146828

申请日：2022-12-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Adam H. Li ,  Eric F. Dellinger ,  Philip Bryn James-Roxby ,  Shomy Sanyal ,  Benjamin Thomas Sander ,  Ralph Detlef Wittig

IPC: G06N3/082

CPC classification number: G06N3/082

Abstract: An apparatus and method for efficiently creating less computationally intensive nodes for a neural network. In various implementations, a computing system includes a processor and a memory with circuitry that stores multiple input data values to process during inference of a trained neural network. The processor determines, during inference, which node input values, node intermediate values, and node output values of the trained neural network to represent in a respective one of multiple available floating-point formats with less precision. No retraining is performed, but rather, the updates to the representations occur during inference. The processor uses selection criteria to reduce the amount of computation involved for updating the representations during inference while maintaining accuracy above an accuracy threshold. To do so, the processor uses the selection criteria to reduce the number of layers, the number of nodes within a layer, and the number of weight values per node to inspect.

公开(公告)号：US20220103907A1

公开(公告)日：2022-03-31

申请号：US17032983

申请日：2020-09-25

Applicant: Advanced Micro Devices, Inc.

Inventor： Adam H. Li ,  Eugene Kuznetsov ,  Girish P. Subramaniam ,  Jihyuk Choi

IPC: H04N21/472 ,  H04N21/6379 ,  H04N19/42 ,  H04N21/4363 ,  H04N21/2343

Abstract: Techniques are provided herein for processing video data. The techniques include identifying one or more input factors including one or more of signal quality factors, video content complexity factors, and hardware buffering factors for one or more of a video encoding system and a video playback system; evaluating the one or more input factors to determine adjustments to apply to one or both of the video encoding system and the video playback system; and applying the determine adjustments to the one or both of the video encoding system and the video playback system.

公开(公告)号：US11275148B2

公开(公告)日：2022-03-15

申请号：US16556154

申请日：2019-08-29

Applicant: Advanced Micro Devices, Inc.

Inventor： Daryl Galen Sartain ,  Adam H. Li ,  Bruce Montag

IPC: G01S5/02 ,  G01S5/16 ,  G01S5/08

Abstract: Disclosed herein are techniques for obtaining location data for a sensor fusion device. The techniques include transmitting or receiving a signal from or to the sensor fusion device. The techniques also include obtaining angle-based location data, based on the signal and on an angle-based location finding technique. The techniques also include determining location data for the sensor fusion device or an auxiliary device associated with the sensor fusion device, based on the angle-based location data.

公开(公告)号：US11212537B2

公开(公告)日：2021-12-28

申请号：US16368293

申请日：2019-03-28

Applicant: Advanced Micro Devices, Inc.

Inventor： Adam H. Li ,  Nathaniel David Naegle

IPC: H04N19/167 ,  H04N19/124 ,  H04N19/176 ,  H04N19/196

Abstract: Systems, apparatuses, and methods for performing efficient video compression are disclosed. A video processing system includes a transmitter sending a video stream over a wireless link to a receiver. The transmitter includes a processor and an encoder. The processor generates rendered blocks of pixels of a video frame, and when the processor predicts a compression level for a given region of the video frame is different from a compression level for immediately neighboring blocks, the processor generates side information. The side information identifies a location of the given region in the video frame and a type of content that causes the compression level differences. The processor sends the rendered video information and the side information as accompanying metadata to the encoder. The encoder updates encoding parameters based on the received side information, and compresses the rendered given region based on the updated encoding parameters.