公开(公告)号：US08988108B2

公开(公告)日：2015-03-24

申请号：US13724218

申请日：2012-12-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Eric Quinnell ,  Christopher Thomas

IPC: H03K19/00 ,  H03K19/096 ,  G06F1/10 ,  G06F1/32

CPC classification number: H03K19/096 ,  G06F1/10 ,  G06F1/3203 ,  G06F1/3237 ,  Y02D10/128

Abstract: Methods relating to distribution of a clock signal to logic devices of an integrated circuit. The method includes controlling, by a logic element, the distribution of a clock signal by a clock gater and distributing the clock signal by the clock gater to at least one first logic device, wherein the logic element allows the first clock gater to distribute the clock signal only when at least one first logic device requires the clock signal. An integrated circuit configured to perform such a method. Fabrication of such an integrated circuit.

Abstract translation: 将时钟信号分配给集成电路的逻辑器件的方法。 该方法包括由逻辑元件控制由时钟同步器分配的时钟信号并将时钟信号分配给至少一个第一逻辑器件，其中逻辑元件允许第一时钟门控器分配时钟 只有当至少一个第一逻辑器件需要时钟信号时才会发出信号。 一种被配置为执行这种方法的集成电路。 这种集成电路的制造。

公开(公告)号：US20140176190A1

公开(公告)日：2014-06-26

申请号：US13724218

申请日：2012-12-21

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Eric Quinnell ,  Christopher Thomas

IPC: H03K19/096

CPC classification number: H03K19/096 ,  G06F1/10 ,  G06F1/3203 ,  G06F1/3237 ,  Y02D10/128

Abstract: Methods relating to distribution of a clock signal to logic devices of an integrated circuit. The method includes controlling, by a logic element, the distribution of a clock signal by a dock gater and distributing the clock signal by the clock gater to at least one first logic device, wherein the logic element allows the first clock gater to distribute the clock signal only when at least one first logic device requires the clock signal. An integrated circuit configured to perform such a method. Fabrication of such an integrated circuit.

Abstract translation: 将时钟信号分配给集成电路的逻辑器件的方法。 该方法包括通过逻辑元件控制由码头门控器分配时钟信号并将时钟信号分配给至少一个第一逻辑器件，其中逻辑元件允许第一时钟门控器分配时钟 只有当至少一个第一逻辑器件需要时钟信号时才会发出信号。 一种被配置为执行这种方法的集成电路。 这种集成电路的制造。