SECURE COPROCESSOR ASSISTED HARDWARE DEBUGGING

    公开(公告)号:US20200158778A1

    公开(公告)日:2020-05-21

    申请号:US16197655

    申请日:2018-11-21

    Inventor: Tan Peng Dong Zhu

    Abstract: Systems, apparatuses, and methods for implementing debug features on a secure coprocessor to handle communication and computation between a debug tool and a debug target are disclosed. A debug tool generates a graphical user interface (GUI) to display debug information to a user for help in debugging a debug target such as a system on chip (SoC). A secure coprocessor is embedded on the debug target, and the secure coprocessor receives debug requests generated by the debug tool. The secure coprocessor performs various computation tasks and/or other operations to prevent multiple round-trip messages being sent back and forth between the debug tool and the debug target. The secure coprocessor is able to access system memory and determine a status of a processor being tested even when the processor becomes unresponsive.

    DATA CENTER SECURE DEBUG UNLOCK
    2.
    发明申请

    公开(公告)号:US20200210600A1

    公开(公告)日:2020-07-02

    申请号:US16359264

    申请日:2019-03-20

    Inventor: Tan Peng Dong Zhu

    Abstract: Systems, apparatuses, and methods for performing debug operations in a secure data center are disclosed. A system includes a computing module coupled to a debug target that includes a processing unit. Prior to being installed in a secure data center, the computing module is preloaded with a signed unlock payload and the debug target is preloaded with a public key of an authentication server. In response to a request to perform debug operations on the debug target in the secure data center, the computing module retrieves and conveys the preloaded signed unlock payload to the debug target. In response to the debug target validating the unlock request with a previously obtained public key of the authentication server, the debug target enters secure debug mode, unlocks the at least one processing unit for debug operations with an unlock vector from the validated unlock payload, and performs debug operations on the processing unit.

    Systems and methods for enabling debugging

    公开(公告)号:US12181955B1

    公开(公告)日:2024-12-31

    申请号:US18087894

    申请日:2022-12-23

    Abstract: A computer-implemented method for enabling debugging can include receiving, at a peripheral device connected through an expansion socket to a base CPU platform, a scan dump instruction from a network computing device connected to the base CPU platform across a network connection and executing, by a System-on-Chip at the peripheral device in response to the scan dump instruction, a debugging procedure. The debugging procedure can include capturing a snapshot of memory of the peripheral device and transmitting the snapshot to the network computing device through memory addresses that have been assigned to memory-mapped input/output. Various other methods, systems, and computer-readable media are also disclosed.

    Secure coprocessor assisted hardware debugging

    公开(公告)号:US10895597B2

    公开(公告)日:2021-01-19

    申请号:US16197655

    申请日:2018-11-21

    Inventor: Tan Peng Dong Zhu

    Abstract: Systems, apparatuses, and methods for implementing debug features on a secure coprocessor to handle communication and computation between a debug tool and a debug target are disclosed. A debug tool generates a graphical user interface (GUI) to display debug information to a user for help in debugging a debug target such as a system on chip (SoC). A secure coprocessor is embedded on the debug target, and the secure coprocessor receives debug requests generated by the debug tool. The secure coprocessor performs various computation tasks and/or other operations to prevent multiple round-trip messages being sent back and forth between the debug tool and the debug target. The secure coprocessor is able to access system memory and determine a status of a processor being tested even when the processor becomes unresponsive.

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