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公开(公告)号：US20200210600A1
公开(公告)日：2020-07-02
申请号：US16359264
申请日：2019-03-20
Applicant: Advanced Micro Devices, Inc.
Abstract: Systems, apparatuses, and methods for performing debug operations in a secure data center are disclosed. A system includes a computing module coupled to a debug target that includes a processing unit. Prior to being installed in a secure data center, the computing module is preloaded with a signed unlock payload and the debug target is preloaded with a public key of an authentication server. In response to a request to perform debug operations on the debug target in the secure data center, the computing module retrieves and conveys the preloaded signed unlock payload to the debug target. In response to the debug target validating the unlock request with a previously obtained public key of the authentication server, the debug target enters secure debug mode, unlocks the at least one processing unit for debug operations with an unlock vector from the validated unlock payload, and performs debug operations on the processing unit.
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公开(公告)号：US20220237333A1
公开(公告)日：2022-07-28
申请号：US17546577
申请日：2021-12-09
Applicant: Advanced Micro Devices, Inc.
Inventor： Tan Peng , Scott Swanstrom
Abstract: A method includes performing a validation process on a firmware feature description file indicating a set of firmware features in an integrated circuit package, and communicating a result of the validation process to firmware feature enablement logic residing in the integrated circuit package.
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Patent Agency Ranking
公开(公告)号：US20200158778A1
公开(公告)日：2020-05-21
申请号：US16197655
申请日：2018-11-21
Applicant: Advanced Micro Devices, Inc.
IPC: G01R31/317 , G01R31/3177 , G06F13/42 , H04L9/08
Abstract: Systems, apparatuses, and methods for implementing debug features on a secure coprocessor to handle communication and computation between a debug tool and a debug target are disclosed. A debug tool generates a graphical user interface (GUI) to display debug information to a user for help in debugging a debug target such as a system on chip (SoC). A secure coprocessor is embedded on the debug target, and the secure coprocessor receives debug requests generated by the debug tool. The secure coprocessor performs various computation tasks and/or other operations to prevent multiple round-trip messages being sent back and forth between the debug tool and the debug target. The secure coprocessor is able to access system memory and determine a status of a processor being tested even when the processor becomes unresponsive.
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公开(公告)号：US10311236B2
公开(公告)日：2019-06-04
申请号：US15358640
申请日：2016-11-22
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Kathirkamanathan Nadarajah , Oswin Housty , Sergey Blotsky , Tan Peng , Hary Devapriyan Mahesan
IPC: G06F9/00 , G06F15/177 , G06F21/57 , G06F9/4401
Abstract: Systems, apparatuses, and methods for performing secure system memory training are disclosed. In one embodiment, a system includes a boot media, a security processor with a first memory, a system memory, and one or more main processors coupled to the system memory. The security processor is configured to retrieve first data from the boot media and store and authenticate the first data in the first memory. The first data includes a first set of instructions which are executable to retrieve, from the boot media, a configuration block with system memory training parameters. The security processor also executes a second set of instructions to initialize and train the system memory using the training parameters. After training the system memory, the security processor retrieves, authenticates, and stores boot code in the system memory and releases the one or more main processors from reset to execute the boot code.
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公开(公告)号：US10895597B2
公开(公告)日：2021-01-19
申请号：US16197655
申请日：2018-11-21
Applicant: Advanced Micro Devices, Inc.
IPC: G01R31/20 , G01R31/317 , G01R31/3177 , G06F13/42 , H04L9/08
Abstract: Systems, apparatuses, and methods for implementing debug features on a secure coprocessor to handle communication and computation between a debug tool and a debug target are disclosed. A debug tool generates a graphical user interface (GUI) to display debug information to a user for help in debugging a debug target such as a system on chip (SoC). A secure coprocessor is embedded on the debug target, and the secure coprocessor receives debug requests generated by the debug tool. The secure coprocessor performs various computation tasks and/or other operations to prevent multiple round-trip messages being sent back and forth between the debug tool and the debug target. The secure coprocessor is able to access system memory and determine a status of a processor being tested even when the processor becomes unresponsive.
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公开(公告)号：US20220237297A1
公开(公告)日：2022-07-28
申请号：US17531735
申请日：2021-11-20
Applicant: Advanced Micro Devices, Inc.
Inventor： Tan Peng , Scott Swanstrom
Abstract: A method includes, in response to a request to enable a set of firmware features in a processing device, performing a validation process based on a key certificate associating a first entity identifier with a firmware feature description file indicating the set of firmware features, and in response to a violation detected during the validation process, enabling a countermeasure in the processing device.
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公开(公告)号：US20180144136A1
公开(公告)日：2018-05-24
申请号：US15358640
申请日：2016-11-22
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Kathirkamanathan Nadarajah , Oswin Housty , Sergey Blotsky , Tan Peng , Hary Devapriyan Mahesan
CPC classification number: G06F21/575 , G06F9/4405
Abstract: Systems, apparatuses, and methods for performing secure system memory training are disclosed. In one embodiment, a system includes a boot media, a security processor with a first memory, a system memory, and one or more main processors coupled to the system memory. The security processor is configured to retrieve first data from the boot media and store and authenticate the first data in the first memory. The first data includes a first set of instructions which are executable to retrieve, from the boot media, a configuration block with system memory training parameters. The security processor also executes a second set of instructions to initialize and train the system memory using the training parameters. After training the system memory, the security processor retrieves, authenticates, and stores boot code in the system memory and releases the one or more main processors from reset to execute the boot code.
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