公开(公告)号：US11657892B1

公开(公告)日：2023-05-23

申请号：US17561115

申请日：2021-12-23

Applicant: Advanced Micro Devices, Inc.

Inventor： Joel Thornton Irby ,  Grady L. Giles

IPC: G11C7/10 ,  G11C29/44 ,  G11C29/12 ,  G11C29/46

CPC classification number: G11C29/4401 ,  G11C7/106 ,  G11C7/1012 ,  G11C7/1036 ,  G11C7/1087 ,  G11C29/1201 ,  G11C29/46 ,  G11C2029/1202

Abstract: An integrated circuit includes a latch array including a plurality of latches logically configured in rows and columns, a plurality of repair latches operatively coupled to the plurality of latches and latch array built in self-test and repair logic (LABISTRL) coupled to the plurality of latches. In some implementations the LABISTRL configures latches in the array as one or more column serial test shift register, detects one or more defective latches of the plurality of latches based on applied test data, and selects at least one repair latch in response to detection of at least one defective latch.

公开(公告)号：US12100464B2

公开(公告)日：2024-09-24

申请号：US18302510

申请日：2023-04-18

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Joel Thornton Irby ,  Grady L. Giles

IPC: G11C7/10 ,  G11C29/12 ,  G11C29/44 ,  G11C29/46

CPC classification number: G11C29/4401 ,  G11C7/1012 ,  G11C7/1036 ,  G11C7/106 ,  G11C7/1087 ,  G11C29/1201 ,  G11C29/46 ,  G11C2029/1202

Abstract: An integrated circuit includes a latch array including a plurality of latches logically configured in rows and columns, a plurality of repair latches operatively coupled to the plurality of latches and latch array built in self-test and repair logic (LABISTRL) coupled to the plurality of latches. In some implementations the LABISTRL configures latches in the array as one or more column serial test shift register, detects one or more defective latches of the plurality of latches based on applied test data, and selects at least one repair latch in response to detection of at least one defective latch.