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公开(公告)号:US10712800B2
公开(公告)日:2020-07-14
申请号:US15907660
申请日:2018-02-28
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor: Benjamin Tsien , Alexander J. Branover , Ming L. So , Philip Ng , Xiao Gang Zheng , Felix Ho , Joseph Scanlon , Christopher T. Weaver , Xiaojie He , Carl Kittredge Wakeland
IPC: G06F1/00 , G06F1/3228 , G06F1/329
Abstract: Systems, apparatuses, and methods for aligning active and idle phases of components in a computing system are disclosed. A computing system includes components that can be forced into an active or idle phase and components that cannot be forced into an active or idle phase. The system implements schemes for aligning the active and idle phases of the components within the system. For example, a timer starts counting when a processor and memory subsystem go from a low power state to an operational state. If the amount of time spent by the processor and memory subsystems in the operational state without transitioning to the low power state exceeds a threshold, the system forces active-to-idle and idle-to-active phase transitions of components in the system in order to cause a realignment of active and idle phases of the various components within the system.
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公开(公告)号:US20230273890A1
公开(公告)日:2023-08-31
申请号:US17682527
申请日:2022-02-28
Applicant: Advanced Micro Devices, Inc.
Inventor: Raul Gutierrez , Indrani Paul , Joseph Scanlon , Aniruddha Dasgupta , Madhusudan Chilakam
CPC classification number: G06F13/385 , G06F13/20 , G06F2213/0042
Abstract: Systems, apparatuses, and methods for a host controller inferring idleness based on activity generated by a bus-attached peripheral device are disclosed. A host controller detects activity by a first device attached to the host controller via a first bus. The host controller generates an activity vector based on the detected activity, and the host controller determines whether the activity vector indicates that the first device is only engaging in handshaking or control activity rather than data transfer. If the first device is merely communicating status information, then the host controller infers idleness and conveys an idleness indicator to a power manager. The power manager turns off power to system memory and/or other components based on the idleness indicator, but keeps enough power on to allow the host controller to communicate with the first device for handshaking or status purposes.
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公开(公告)号:US20190265774A1
公开(公告)日:2019-08-29
申请号:US15907660
申请日:2018-02-28
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor: Benjamin Tsien , Alexander J. Branover , Ming L. So , Philip Ng , Xiao Gang Zheng , Felix Ho , Joseph Scanlon , Christopher T. Weaver , Xiaojie He , Carl Kittredge Wakeland
IPC: G06F1/32
Abstract: Systems, apparatuses, and methods for aligning active and idle phases of components in a computing system are disclosed. A computing system includes components that can be forced into an active or idle phase and components that cannot be forced into an active or idle phase. The system implements schemes for aligning the active and idle phases of the components within the system. For example, a timer starts counting when a processor and memory subsystem go from a low power state to an operational state. If the amount of time spent by the processor and memory subsystems in the operational state without transitioning to the low power state exceeds a threshold, the system forces active-to-idle and idle-to-active phase transitions of components in the system in order to cause a realignment of active and idle phases of the various components within the system.
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