公开(公告)号：US09032274B2

公开(公告)日：2015-05-12

申请号：US13898806

申请日：2013-05-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Shadi M. Barakat ,  Bhuvanachandran K. Nair ,  Paul-Hugo Lamarche

IPC: H03M13/00 ,  G01R31/28 ,  G06F11/00 ,  H04L7/00 ,  H04L1/12 ,  H04L1/24 ,  H04L25/14 ,  G11C29/02 ,  H04L7/033 ,  H04L7/10

CPC classification number: H04L1/12 ,  G11C29/022 ,  G11C29/023 ,  G11C29/028 ,  G11C2211/4061 ,  H04L1/243 ,  H04L7/033 ,  H04L7/10 ,  H04L25/14

Abstract: A multi-link input/output (I/O) interface uses both feed-forward and feedback signaling to reduce the impact of noise on data capture at a memory controller. To transfer data from a source module to a destination module, a defined pattern is communicated from the memory module along a master channel concurrent with the memory module providing data via one or more slave channels. Based on the phase of the defined pattern as it is received, the multi-link I/O interface feeds forward to the slave channels control signaling whose phase reflects a predicted noise pattern for the system. Each slave channel performs CDR by adjusting timing of its corresponding capture clock signal based on the fed forward control signaling and based on feedback signaling for the corresponding slave channel, whereby the feedback signaling reflects an error measurement between a phase of a capture clock signal and transitions in received data.

Abstract translation: 多链路输入/输出（I / O）接口使用前馈和反馈信号来减少噪声对存储器控制器上的数据采集的影响。 为了将数据从源模块传送到目的地模块，定义的模式从存储器模块沿着主通道与存储器模块同时传送，通过一个或多个从属通道提供数据。 基于接收到的定义模式的相位，多链路I / O接口向前馈送到从属信道控制信令，其相位反映了系统的预测噪声模式。 每个从属信道通过基于前向控制信令调整其对应的捕获时钟信号的定时并基于对应从属信道的反馈信令来执行CDR，由此反馈信令反映捕获时钟信号的相位与转换之间的误差测量 在收到的数据。

公开(公告)号：US20140229785A1

公开(公告)日：2014-08-14

申请号：US13898806

申请日：2013-05-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Shadi M. Barakat ,  Bhuvanachandran K. Nair ,  Paul-Hugo Lamarche

IPC: H04L1/12

CPC classification number: H04L1/12 ,  G11C29/022 ,  G11C29/023 ,  G11C29/028 ,  G11C2211/4061 ,  H04L1/243 ,  H04L7/033 ,  H04L7/10 ,  H04L25/14

Abstract: A multi-link input/output (I/O) interface uses both feed-forward and feedback signaling to reduce the impact of noise on data capture at a memory controller. To transfer data from a source module to a destination module, a defined pattern is communicated from the memory module along a master channel concurrent with the memory module providing data via one or more slave channels. Based on the phase of the defined pattern as it is received, the multi-link I/O interface feeds forward to the slave channels control signaling whose phase reflects a predicted noise pattern for the system. Each slave channel performs CDR by adjusting timing of its corresponding capture clock signal based on the fed forward control signaling and based on feedback signaling for the corresponding slave channel, whereby the feedback signaling reflects an error measurement between a phase of a capture clock signal and transitions in received data.

Abstract translation: 多链路输入/输出（I / O）接口使用前馈和反馈信号来减少噪声对存储器控制器上的数据采集的影响。 为了将数据从源模块传送到目的地模块，定义的模式从存储器模块沿着主通道与存储器模块同时传送，通过一个或多个从属通道提供数据。 基于接收到的定义模式的相位，多链路I / O接口向前馈送到从属信道控制信令，其相位反映了系统的预测噪声模式。 每个从属信道通过基于前向控制信令调整其对应的捕获时钟信号的定时并基于对应的从属信道的反馈信令来执行CDR，由此反馈信令反映捕获时钟信号的相位与转换之间的误差测量 在收到的数据。