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公开(公告)号：US12072952B2
公开(公告)日：2024-08-27
申请号：US17214779
申请日：2021-03-26
Applicant: Advanced Micro Devices, Inc.
IPC: G06F17/16 , G06F7/523 , G06F7/544 , H03K19/173
CPC classification number: G06F17/16 , G06F7/523 , G06F7/5443 , H03K19/1737
Abstract: A processing device is provided which comprises memory configured to store data and a processor. The processor comprises a plurality of MACs configured to perform matrix multiplication of elements of a first matrix and elements of a second matrix. The processor also comprises a plurality of logic devices configured to sum values of bits of product exponents values of the elements of the first matrix and second matrix and determine keep bit values for product exponents values to be kept for matrix multiplication. The processor also comprises a plurality of multiplexor arrays each configured to receive bits of the elements of the first matrix and the second matrix and the keep bit values and provide data for selecting which elements of the first matrix and the second matrix values are provided to the MACs for matrix multiplication.
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公开(公告)号：US11657119B2
公开(公告)日：2023-05-23
申请号：US16557911
申请日：2019-08-30
Applicant: Advanced Micro Devices, Inc.
Inventor： Swapnil P. Sakharshete , Samuel Lawrence Wasmundt , Maxim V. Kazakov , Vineet Goel
Abstract: A processing device is provided which includes memory configured to store data and a processor configured to determine, based on convolutional parameters associated with an image, a virtual general matrix-matrix multiplication (GEMM) space of a virtual GEMM space output matrix and generate, in the virtual GEMM space output matrix, a convolution result by matrix multiplying the data corresponding to a virtual GEMM space input matrix with the data corresponding to a virtual GEMM space filter matrix. The processing device also includes convolutional mapping hardware configured to map, based on the convolutional parameters, positions of the virtual GEMM space input matrix to positions of an image space of the image.
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公开(公告)号：US11544815B2
公开(公告)日：2023-01-03
申请号：US16687569
申请日：2019-11-18
Applicant: Advanced Micro Devices, Inc.
Inventor： Alexander M. Potapov , Skyler Jonathon Saleh , Swapnil P. Sakharshete , Vineet Goel
IPC: G06T3/40
Abstract: A processing device is provided which includes memory and a processor. The processor is configured to receive an input image having a first resolution, generate linear down-sampled versions of the input image by down-sampling the input image via a linear upscaling network and generate non-linear down-sampled versions of the input image by down-sampling the input image via a non-linear upscaling network. The processor is also configured to convert the down-sampled versions of the input image into pixels of an output image having a second resolution higher than the first resolution and provide the output image for display.
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公开(公告)号：US20220309125A1
公开(公告)日：2022-09-29
申请号：US17214779
申请日：2021-03-26
Applicant: Advanced Micro Devices, Inc.
IPC: G06F17/16 , G06F7/544 , G06F7/523 , H03K19/173
Abstract: A processing device is provided which comprises memory configured to store data and a processor. The processor comprises a plurality of MACs configured to perform matrix multiplication of elements of a first matrix and elements of a second matrix. The processor also comprises a plurality of logic devices configured to sum values of bits of product exponents values of the elements of the first matrix and second matrix and determine keep bit values for product exponents values to be kept for matrix multiplication. The processor also comprises a plurality of multiplexor arrays each configured to receive bits of the elements of the first matrix and the second matrix and the keep bit values and provide data for selecting which elements of the first matrix and the second matrix values are provided to the MACs for matrix multiplication.
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公开(公告)号：US20210374607A1
公开(公告)日：2021-12-02
申请号：US17129739
申请日：2020-12-21
Applicant: Advanced Micro Devices, Inc.
Inventor： Maxim V. Kazakov , Swapnil P. Sakharshete , Milind N. Nemlekar , Vineet Goel
Abstract: A device is disclosed. The device includes a machine learning die including a memory and one or more machine learning accelerators; and a processing core die stacked with the machine learning die, the processing core die being configured to execute shader programs for controlling operations on the machine learning die, wherein the memory is configurable as either or both of a cache and a directly accessible memory.
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Patent Agency Ranking
公开(公告)号：US20230004871A1
公开(公告)日：2023-01-05
申请号：US17364787
申请日：2021-06-30
Applicant: Advanced Micro Devices, Inc.
Abstract: Methods, systems, and devices for pipeline fusion of a plurality of kernels. In some implementations, a first batch of a first kernel is executed on a first processing device to generate a first output of the first kernel based on an input. A first batch of a second kernel is executed on a second processing device to generate a first output of the second kernel based on the first output of the first kernel. A second batch of the first kernel is executed on the first processing device to generate a second output of the first kernel based on the input. The execution of the second batch of the first kernel overlaps at least partially in time with executing the first batch of the second kernel.
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公开(公告)号：US20220101110A1
公开(公告)日：2022-03-31
申请号：US17032971
申请日：2020-09-25
Applicant: Advanced Micro Devices, Inc.
Inventor： Swapnil P. Sakharshete , Maxim V. Kazakov
Abstract: Techniques are disclosed for performing machine learning operations. The techniques include fetching weights for a first layer in a first format; performing matrix multiplication of the weights fetched in the first format with values provided by a prior layer in a forwards training pass; fetching the weights for the first layer in a second format different from the first format; and performing matrix multiplication for a backwards pass, the matrix multiplication including multiplication of the weights fetched in the second format with values corresponding to values provided as the result of the forwards training pass for the first layer.
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公开(公告)号：US20210150669A1
公开(公告)日：2021-05-20
申请号：US16687569
申请日：2019-11-18
Applicant: Advanced Micro Devices, Inc.
Inventor： Alexander M. Potapov , Skyler Jonathon Saleh , Swapnil P. Sakharshete , Vineet Goel
IPC: G06T3/40
Abstract: A processing device is provided which includes memory and a processor. The processor is configured to receive an input image having a first resolution, generate linear down-sampled versions of the input image by down-sampling the input image via a linear upscaling network and generate non-linear down-sampled versions of the input image by down-sampling the input image via a non-linear upscaling network. The processor is also configured to convert the down-sampled versions of the input image into pixels of an output image having a second resolution higher than the first resolution and provide the output image for display
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公开(公告)号：US12197533B2
公开(公告)日：2025-01-14
申请号：US17214784
申请日：2021-03-26
Applicant: Advanced Micro Devices, Inc.
Abstract: A processing device is provided which comprises memory configured to store data and a processor configured to receive a portion of data of a first matrix comprising a first plurality of elements and receive a portion of data of a second matrix comprising a second plurality of elements. The processor is also configured to determine values for a third matrix by dropping a number of products from products of pairs of elements of the first and second matrices based on approximating the products of the pairs of elements as a sum of the exponents of the pairs of elements and performing matrix multiplication on remaining products of the pairs of elements of the first and second matrices.
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公开(公告)号：US11967043B2
公开(公告)日：2024-04-23
申请号：US18089209
申请日：2022-12-27
Applicant: Advanced Micro Devices, Inc.
Inventor： Alexander M. Potapov , Skyler Jonathon Saleh , Swapnil P. Sakharshete , Vineet Goel
IPC: G06T3/40 , G06T3/4046 , G06T3/4053 , G06T3/4069
CPC classification number: G06T3/4046 , G06T3/4053 , G06T3/4069
Abstract: A processing device is provided which includes memory and a processor. The processor is configured to receive an input image having a first resolution, generate at least one linear down-sampled version of the input image via a linear upscaling network, generate at least one non-linear down-sampled version of the input image via a non-linear upscaling network, extract a first feature map from the at least one linear down-sampled version of the input image, and extract a second feature map from the at least one non-linear down-sampled version of the input image. The processor is also configured to convert the at least one linear down-sampled version of the input image and the at least one non-linear down-sampled version of the input image into pixels of an output image having a second resolution higher than the first resolution using the first feature map and the second feature map.
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