公开(公告)号：US09773753B1

公开(公告)日：2017-09-26

申请号：US15356400

申请日：2016-11-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yuan-Ting Lin ,  Chi-Yu Wang ,  Wei-Hong Lai ,  Chin-Li Kao

IPC: H01L23/48 ,  H01L25/065 ,  H01L25/00 ,  H01L23/538 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/5389 ,  H01L21/568 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2924/14 ,  H01L2924/3511

Abstract: A semiconductor device includes a first die, a second die, an encapsulant, a first dielectric layer, and at least one first trace. The first die includes a first surface and a second surface opposite to the first surface and includes at least one first pad disposed adjacent to the first surface of the first die. The second die includes a first surface and a second surface opposite to the first surface and includes at least one second pad disposed adjacent to the first surface of the second die. The first dielectric layer is disposed on at least a portion of the first surface of the first die and at least a portion of the first surface of the second die. The first trace is disposed on the first dielectric layer, which connects the first pad to the second pad, and the first trace comprises an end portion disposed adjacent to the first pad and a body portion, and the end portion extends at an angle θ1 relative to a direction of extension of the body portion.

公开(公告)号：US11101237B2

公开(公告)日：2021-08-24

申请号：US17009594

申请日：2020-09-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming Hsien Chu ,  Chi-Yu Wang

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L25/065 ,  H01L21/56

Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.

公开(公告)号：US11037898B2

公开(公告)日：2021-06-15

申请号：US16358616

申请日：2019-03-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming Hsien Chu ,  Chi-Yu Wang

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L23/66 ,  H01L21/683 ,  H01L21/56 ,  H01L21/48

Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.

公开(公告)号：US10763234B2

公开(公告)日：2020-09-01

申请号：US16162346

申请日：2018-10-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming Hsien Chu ,  Chi-Yu Wang

IPC: H01L23/00 ,  H01L23/31 ,  H01L25/065 ,  H01L21/56 ,  H01L23/498 ,  H01L23/538

Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.

公开(公告)号：US11784152B2

公开(公告)日：2023-10-10

申请号：US17347215

申请日：2021-06-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming Hsien Chu ,  Chi-Yu Wang

IPC: H01L29/40 ,  H01L23/48 ,  H01L23/52 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L23/66 ,  H01L21/683 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L24/20 ,  H01L21/4857 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/66 ,  H01L24/19 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2223/6677 ,  H01L2224/211 ,  H01L2224/221 ,  H01L2924/3511

Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.