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    SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20190067142A1

    公开(公告)日：2019-02-28

    申请号：US15685869

    申请日：2017-08-24

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Jen-Kuang FANG ,  Wen-Long LU

    IPC: H01L23/31 ,  H01L21/48 ,  H01L21/768 ,  H01L25/065 ,  H01L25/00 ,  B23K3/06 ,  H01L23/00

    Abstract: A semiconductor package device comprises a first dielectric layer, a first conductive pad and a first conductive element. The first dielectric layer has a first surface and a second surface opposite to the first surface. The first dielectric layer defines a first opening tapered from the first surface toward the second surface. The first conductive pad is within the first opening and adjacent to the second surface of the first dielectric layer. At least a portion of the first conductive element is within the first opening. The first conductive element is engaged with (e.g., abuts) a sidewall of the first opening, the first conductive element having a first surface facing toward the first conductive pad, wherein the first surface of the first conductive element is spaced apart from the first conductive pad.

    SEMICONDUCTOR DEVICE PACKAGE
    5.
    发明申请
    SEMICONDUCTOR DEVICE PACKAGE 审中-公开

    公开(公告)号：US20190157197A1

    公开(公告)日：2019-05-23

    申请号：US15821599

    申请日：2017-11-22

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Jen-Kuang FANG ,  Wen-Long LU

    IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

    Abstract: A semiconductor device package includes an electronic component, a first substrate, a first bonding wire and a second substrate. The electronic component has a first surface. The first substrate is disposed on the first surface of the electronic component. The first bonding wire electrically connects the first substrate to the electronic component. The second substrate is disposed on the first surface of the electronic component. The second substrate defines an opening accommodating the first substrate and the first bonding wire.

    SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20190051590A1

    公开(公告)日：2019-02-14

    申请号：US15673239

    申请日：2017-08-09

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Jen-Kuang FANG ,  Wen-Long LU

    IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L25/00

    Abstract: A semiconductor package device includes a circuit layer having a top surface, a first electronic component disposed on the top surface of the circuit layer, and a first conductive element disposed on the top surface of the circuit layer, the first conductive element having a top surface. The first electronic component has an active surface and a back surface facing the top surface of the circuit layer. A distance between the active surface of the first electronic component and the top surface of the circuit layer is greater than a distance between the top surface of the first conductive element and the top surface of the circuit layer.

    SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
    8.
    发明申请
    SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20190013284A1

    公开(公告)日：2019-01-10

    申请号：US15642005

    申请日：2017-07-05

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Jen-Kuang FANG ,  Wen-Long LU

    IPC: H01L23/00 ,  H01L23/055 ,  H01L25/065 ,  B23K35/02

    Abstract: A semiconductor package device includes a carrier, a first electronic component, and a conductive element on the carrier. The first electronic component is over the carrier. The conductive element is on the carrier and electrically connects the first electronic component to the carrier. The conductive element includes at least one conductive particle and a solder material covering the conductive particle, and the conductive particle includes a metal core, a barrier layer covering the metal core, and a metal layer covering the barrier layer.

    SEMICONDUCTOR PACKAGE STRUCTURE
    9.
    发明申请
    SEMICONDUCTOR PACKAGE STRUCTURE 有权
    半导体封装结构

    公开(公告)号：US20160079157A1

    公开(公告)日：2016-03-17

    申请号：US14486755

    申请日：2014-09-15

    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

    Inventor： Jen-Kuang FANG ,  Kuo-Hua CHEN

    IPC: H01L23/528 ,  H01L23/522 ,  H01L23/00

    CPC classification number: H01L24/33 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/09 ,  H01L24/17 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/06164 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/381

    Abstract: The present disclosure relates to a semiconductor package structure, including a die and a package substrate. The die includes a semiconductor substrate, multiple interconnect metal layers, and at least one inter-level dielectric disposed between ones of the interconnect metal layers. Each inter-level dielectric is formed of a low k material. An outermost interconnect metal layer has multiple first conductive segments exposed from a surface of the inter-level dielectric. The package substrate includes a substrate body and multiple second conductive segments exposed from a surface of the substrate body. The second conductive segments are electrically connected to the first conductive segments.

    Abstract translation: 本公开涉及包括管芯和封装衬底的半导体封装结构。 芯片包括半导体衬底，多个互连金属层以及设置在互连金属层之间的至少一个层间电介质。 每个层间电介质由低k材料形成。 最外面的互连金属层具有从层间电介质的表面暴露的多个第一导电段。 封装衬底包括衬底主体和从衬底主体的表面暴露的多个第二导电段。 第二导电段电连接到第一导电段。

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