公开(公告)号：US12015000B2

公开(公告)日：2024-06-18

申请号：US17328563

申请日：2021-05-24

申请人： Amkor Technology Singapore Holding Pte. Ltd.

发明人： Bora Baloglu ,  Curtis Zwenger ,  Ron Huemoeller

IPC分类号： H01L21/00 ,  H01L23/00 ,  H01L25/00 ,  H01L25/10 ,  H01L25/065

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L25/105 ,  H01L25/50 ,  H01L25/0657 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05575 ,  H01L2224/0558 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/1147 ,  H01L2224/13018 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1405 ,  H01L2224/16055 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/80203 ,  H01L2224/81005 ,  H01L2224/81141 ,  H01L2224/81203 ,  H01L2224/8134 ,  H01L2224/81385 ,  H01L2224/81898 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2224/94 ,  H01L2224/81 ,  H01L2224/94 ,  H01L2224/11 ,  H01L2224/05666 ,  H01L2924/01028 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2924/01074 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2224/05147 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/05124 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/05139 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/05144 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/05155 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/05671 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/05666 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/013 ,  H01L2224/05666 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/013

摘要： A structure and method for performing metal-to-metal bonding in an electrical device. For example and without limitation, various aspects of this disclosure provide a structure and method that utilize an interlocking structure configured to enhance metal-to-metal bonding.

公开(公告)号：US20240170420A1

公开(公告)日：2024-05-23

申请号：US18202519

申请日：2023-05-26

申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.

发明人： Chanhoon Ko ,  Chulmin Lee ,  Inhwan Oh ,  Kyounghee Lim ,  Sohyun Bae ,  Sanghoon Kim

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L2224/0346 ,  H01L2224/03632 ,  H01L2224/05572

摘要： A substrate includes: a first insulating layer; a second insulating layer disposed on the first insulating layer; and a via hole including a lower hole formed in the first insulating layer, and an upper hole formed in the second insulating layer and connected to the lower hole, in which a width of an upper side of the lower hole is larger than a width of a lower side of the lower hole, and a width of an upper side of the upper hole is larger than a width of a lower side of the upper hole.

公开(公告)号：US11894299B2

公开(公告)日：2024-02-06

申请号：US17188787

申请日：2021-03-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chao-Wen Shih ,  Chen-Hua Yu ,  Han-Ping Pu ,  Hsin-Yu Pan ,  Hao-Yi Tsai ,  Sen-Kuei Hsu

IPC分类号： H01L23/52 ,  H01L23/525 ,  H01L23/552 ,  H01L23/00 ,  H01L23/522 ,  H01L23/532 ,  H01L23/29 ,  H01L23/31 ,  H01L21/56 ,  H01L23/528 ,  H01L21/768

CPC分类号： H01L23/525 ,  H01L21/56 ,  H01L23/293 ,  H01L23/3192 ,  H01L23/5225 ,  H01L23/5329 ,  H01L23/552 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/14 ,  H01L21/76807 ,  H01L21/76816 ,  H01L21/76885 ,  H01L23/5286 ,  H01L24/13 ,  H01L2224/0348 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/11622 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/16104 ,  H01L2224/03462 ,  H01L2924/00014

摘要： A method includes forming a dielectric layer over a contact pad of a device, forming a first polymer layer over the dielectric layer, forming a first conductive line and a first portion of a second conductive line over the first polymer layer, patterning a photoresist to form an opening over the first portion of the second conductive feature, wherein after patterning the photoresist the first conductive line remains covered by photoresist, forming a second portion of the second conductive line in the opening, wherein the second portion of the second conductive line physically contacts the first portion of the second conductive line, and forming a second polymer layer extending completely over the first conductive line and the second portion of the second conductive line.

公开(公告)号：US20230386864A1

公开(公告)日：2023-11-30

申请号：US18447460

申请日：2023-08-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsien-Wei Chen ,  Der-Chyang Yeh ,  Li-Hsien Huang

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065

CPC分类号： H01L21/563 ,  H01L23/3171 ,  H01L24/06 ,  H01L23/3185 ,  H01L24/03 ,  H01L24/11 ,  H01L24/05 ,  H01L25/0657 ,  H01L24/00 ,  H01L2224/034 ,  H01L2224/0401 ,  H01L23/3192 ,  H01L24/81 ,  H01L2224/02375 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0362 ,  H01L2224/05022 ,  H01L2224/0508 ,  H01L2224/05548 ,  H01L2224/0616 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/94 ,  H01L2224/02311 ,  H01L2224/05572 ,  H01L25/105

摘要： Stacked semiconductor devices and methods of forming the same are provided. Contact pads are formed on a die. A passivation layer is blanket deposited over the contact pads. The passivation layer is subsequently patterned to form first openings, the first openings exposing the contact pads. A buffer layer is blanket deposited over the passivation layer and the contact pads. The buffer layer is subsequently patterned to form second openings, the second opening exposing a first set of the contact pads. First conductive pillars are formed in the second openings. Conductive lines are formed over the buffer layer simultaneously with the first conductive pillars, ends of the conductive lines terminating with the first conductive pillars. An external connector structure is formed over the first conductive pillars and the conductive lines, the first conductive pillars electrically coupling the contact pads to the external connector structure.

公开(公告)号：US11823912B2

公开(公告)日：2023-11-21

申请号：US17876300

申请日：2022-07-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsien-Wei Chen ,  Der-Chyang Yeh ,  Li-Hsien Huang

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L21/563 ,  H01L23/3171 ,  H01L23/3185 ,  H01L24/00 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L25/0657 ,  H01L23/3192 ,  H01L24/81 ,  H01L25/105 ,  H01L2224/02311 ,  H01L2224/02375 ,  H01L2224/034 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0362 ,  H01L2224/0401 ,  H01L2224/0508 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/0616 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/94 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1047 ,  H01L2225/1058

摘要： Stacked semiconductor devices and methods of forming the same are provided. Contact pads are formed on a die. A passivation layer is blanket deposited over the contact pads. The passivation layer is subsequently patterned to form first openings, the first openings exposing the contact pads. A buffer layer is blanket deposited over the passivation layer and the contact pads. The buffer layer is subsequently patterned to form second openings, the second opening exposing a first set of the contact pads. First conductive pillars are formed in the second openings. Conductive lines are formed over the buffer layer simultaneously with the first conductive pillars, ends of the conductive lines terminating with the first conductive pillars. An external connector structure is formed over the first conductive pillars and the conductive lines, the first conductive pillars electrically coupling the contact pads to the external connector structure.

公开(公告)号：US11791286B2

公开(公告)日：2023-10-17

申请号：US17405487

申请日：2021-08-18

申请人： Samsung Electronics Co., Ltd.

发明人： Youn-ji Min ,  Seok-hyun Lee

IPC分类号： H01L23/00

CPC分类号： H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/11 ,  H01L2224/02125 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05572 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/13021 ,  H01L2224/13023 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2224/05556 ,  H01L2924/00012 ,  H01L2224/03462 ,  H01L2924/00014 ,  H01L2224/03464 ,  H01L2924/00014 ,  H01L2224/1132 ,  H01L2924/00014 ,  H01L2224/11462 ,  H01L2924/00014 ,  H01L2224/11464 ,  H01L2924/00014 ,  H01L2224/11849 ,  H01L2924/00014

摘要： Some example embodiments relate to a semiconductor device and a semiconductor package. The semiconductor package includes a substrate including a conductive layer, an insulating layer coating the substrate, the insulating layer including an opening exposing at least part of the conductive layer, and an under-bump metal layer electrically connected to the at least part of the conductive layer exposed through the opening, wherein the insulating layer includes at least one recess adjacent to the opening, and the under-bump metal layer fills the at least one recess. The semiconductor device and the semiconductor package may have improved drop test characteristics and impact resistance.

公开(公告)号：US11658153B2

公开(公告)日：2023-05-23

申请号：US16884773

申请日：2020-05-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun-Hung Lin

IPC分类号： H01L21/31 ,  H01L25/065 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L21/784

CPC分类号： H01L25/0657 ,  H01L21/565 ,  H01L21/78 ,  H01L21/784 ,  H01L23/315 ,  H01L23/3114 ,  H01L23/3192 ,  H01L24/11 ,  H01L24/14 ,  H01L24/19 ,  H01L24/94 ,  H01L23/562 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L24/96 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/11009 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/14131 ,  H01L2224/14133 ,  H01L2224/14134 ,  H01L2224/14179 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2924/1032 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00 ,  H01L2224/94 ,  H01L2224/11 ,  H01L2224/94 ,  H01L2224/03 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2224/05139 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/01029

摘要： A chip includes a semiconductor substrate, an electrical connector over the semiconductor substrate, and a molding compound molding a lower part of the electrical connector therein. A top surface of the molding compound is lower than a top end of the electrical connector. A recess extends from the top surface of the molding compound into the molding compound.

公开(公告)号：US11658142B2

公开(公告)日：2023-05-23

申请号：US16947786

申请日：2020-08-17

申请人： AT&S Austria Technologie & Systemtechnik Aktiengesellschaft

发明人： Heinz Moitzi ,  Johannes Stahr ,  Andreas Zluc

IPC分类号： H01L21/00 ,  H01L23/00 ,  H01L21/48 ,  H01L23/498 ,  H05K1/11 ,  H05K1/18 ,  H05K3/34

CPC分类号： H01L24/16 ,  H01L21/4846 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/13 ,  H01L24/81 ,  H05K1/111 ,  H05K1/181 ,  H05K3/3436 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/05572 ,  H01L2224/13019 ,  H01L2224/1607 ,  H01L2224/16059 ,  H01L2224/81143 ,  H01L2224/81345 ,  H01L2224/81801 ,  H05K2201/09472 ,  H05K2201/10636 ,  H05K2201/10727 ,  H05K2203/048

摘要： A connection arrangement for forming a component carrier structure is disclosed. The connection arrangement includes a first electrically conductive connection element and a second electrically conductive connection element. The first connection element and the second connection element are configured such that, upon connecting the first connection element with the second connection element along a connection direction, a form fit is established between the first connection element and the second connection element that limits a relative motion between the first connection element and the second connection element in a plane perpendicular to the connection direction. A component carrier and a method of forming a component carrier structure are also disclosed.

公开(公告)号：US20190181079A1

公开(公告)日：2019-06-13

申请号：US15864348

申请日：2018-01-08

申请人： NXP USA, Inc.

发明人： Nishant Lakhera ,  Gilles Montoriol ,  Trung Duong ,  Akhilesh Kumar Singh ,  Navas Khan Oratti Kalandar

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L23/48 ,  H01L23/538 ,  H01L25/065 ,  H01L25/00 ,  H01L23/31

CPC分类号： H01L23/49816 ,  H01L21/486 ,  H01L23/04 ,  H01L23/10 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49838 ,  H01L23/5386 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/056 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/83192 ,  H01L2224/92242 ,  H01L2224/94 ,  H01L2924/14 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/00014

摘要： Embodiments are provided herein for a packaged semiconductor device and method of fabricating, the device including: a semiconductor die; a redistribution layer (RDL) structure on an active side of the semiconductor die, the RDL structure including a plurality of contact pads on an outer surface of the RDL structure; a plurality of external connections attached to the plurality of contact pads; and a support structure including an attachment portion and two or more standing members extending from an inner surface of the attachment portion, wherein a back side of the package body is attached to the inner surface of the attachment portion.

公开(公告)号：US20190074255A1

公开(公告)日：2019-03-07

申请号：US16181130

申请日：2018-11-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsien-Wei CHEN ,  Hao-Yi TSAI ,  Mirng-Ji LII ,  Chen-Hua YU

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/522 ,  H01L23/525

CPC分类号： H01L23/562 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/522 ,  H01L23/525 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02235 ,  H01L2224/02255 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05552 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor substrate, a passivation layer overlying the semiconductor substrate, and an interconnect structure overlying the passivation layer. The interconnect structure includes a landing pad region and a dummy region electrically separated from each other. A protective layer is formed on the interconnect structure and has a first opening exposing a portion of the landing pad region and a second opening exposing a portion of the dummy region. A metal layer is formed on the exposed portion of landing pad region and the exposed portion of the dummy region. A bump is formed on the metal layer overlying the landing pad region.