公开(公告)号：US11024569B2

公开(公告)日：2021-06-01

申请号：US15673239

申请日：2017-08-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jen-Kuang Fang ,  Wen-Long Lu

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/31 ,  H01L25/00 ,  H01L23/00 ,  H01L21/683 ,  H01L21/56

Abstract: A semiconductor package device includes a circuit layer having a top surface, a first electronic component disposed on the top surface of the circuit layer, and a first conductive element disposed on the top surface of the circuit layer, the first conductive element having a top surface. The first electronic component has an active surface and a back surface facing the top surface of the circuit layer. A distance between the active surface of the first electronic component and the top surface of the circuit layer is greater than a distance between the top surface of the first conductive element and the top surface of the circuit layer.

公开(公告)号：US10224301B2

公开(公告)日：2019-03-05

申请号：US15642005

申请日：2017-07-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jen-Kuang Fang ,  Wen-Long Lu

IPC: H01L23/00 ,  H01L23/055 ,  H01L25/065 ,  B23K35/02 ,  B23K101/40

Abstract: A semiconductor package device includes a carrier, a first electronic component, and a conductive element on the carrier. The first electronic component is over the carrier. The conductive element is on the carrier and electrically connects the first electronic component to the carrier. The conductive element includes at least one conductive particle and a solder material covering the conductive particle, and the conductive particle includes a metal core, a barrier layer covering the metal core, and a metal layer covering the barrier layer.

公开(公告)号：US10672696B2

公开(公告)日：2020-06-02

申请号：US15821599

申请日：2017-11-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jen-Kuang Fang ,  Wen-Long Lu

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

Abstract: A semiconductor device package includes an electronic component, a first substrate, a first bonding wire and a second substrate. The electronic component has a first surface. The first substrate is disposed on the first surface of the electronic component. The first bonding wire electrically connects the first substrate to the electronic component. The second substrate is disposed on the first surface of the electronic component. The second substrate defines an opening accommodating the first substrate and the first bonding wire.

公开(公告)号：US10685934B2

公开(公告)日：2020-06-16

申请号：US15645975

申请日：2017-07-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jen-Kuang Fang ,  Wen-Long Lu

IPC: H01L23/48 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device package includes an electronic component, a first set of conductive wires electrically connected to the electronic component, and an insulation layer surrounding the first set of conductive wires. The insulation layer exposes a portion of the first set of the conductive wires. The insulation layer is devoid of a filler.

公开(公告)号：US10566279B2

公开(公告)日：2020-02-18

申请号：US15880377

申请日：2018-01-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu ,  Jen-Kuang Fang ,  Min Lung Huang ,  Chan Wen Liu ,  Ching Kuo Hsu

IPC: H01L23/31 ,  H01L23/522 ,  H01L23/498 ,  H01L21/56 ,  H01L21/48

Abstract: A package device includes a circuit layer, at least one conductive segment, an encapsulant and a redistribution layer. The conductive segment is disposed on the circuit layer and has a first surface and a second surface. The encapsulant encapsulates at least a portion of the conductive segment and has a first upper surface. A first portion of the first surface and at least a portion of the second surface of the conductive segment are disposed above the first upper surface of the encapsulant. The redistribution layer is disposed on the encapsulant, the first portion of the first surface of the conductive segment, and the second surface of the conductive segment.

公开(公告)号：US10818636B2

公开(公告)日：2020-10-27

申请号：US16118235

申请日：2018-08-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu ,  Jen-Kuang Fang

IPC: H01L21/762 ,  H01L23/00 ,  H01L23/28 ,  H01L23/498

Abstract: A substrate panel structure includes a plurality of sub-panels and a dielectric portion. Each of the sub-panels includes a plurality of substrate units. The dielectric portion is disposed between the sub-panels.

公开(公告)号：US10269672B2

公开(公告)日：2019-04-23

申请号：US15685869

申请日：2017-08-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jen-Kuang Fang ,  Wen-Long Lu

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01R12/75 ,  H05K3/30 ,  H01L21/48 ,  H01L21/768 ,  H01L25/065 ,  H01L25/00 ,  B23K3/06

Abstract: A semiconductor package device comprises a first dielectric layer, a first conductive pad and a first conductive element. The first dielectric layer has a first surface and a second surface opposite to the first surface. The first dielectric layer defines a first opening tapered from the first surface toward the second surface. The first conductive pad is within the first opening and adjacent to the second surface of the first dielectric layer. At least a portion of the first conductive element is within the first opening. The first conductive element is engaged with (e.g., abuts) a sidewall of the first opening, the first conductive element having a first surface facing toward the first conductive pad, wherein the first surface of the first conductive element is spaced apart from the first conductive pad.

公开(公告)号：US09748196B2

公开(公告)日：2017-08-29

申请号：US14486755

申请日：2014-09-15

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Jen-Kuang Fang ,  Kuo-Hua Chen

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/522

CPC classification number: H01L24/33 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/09 ,  H01L24/17 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/06164 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/381

Abstract: The present disclosure relates to a semiconductor package structure, including a die and a package substrate. The die includes a semiconductor substrate, multiple interconnect metal layers, and at least one inter-level dielectric disposed between ones of the interconnect metal layers. Each inter-level dielectric is formed of a low k material. An outermost interconnect metal layer has multiple first conductive segments exposed from a surface of the inter-level dielectric. The package substrate includes a substrate body and multiple second conductive segments exposed from a surface of the substrate body. The second conductive segments are electrically connected to the first conductive segments.