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公开(公告)号:US20240194609A1
公开(公告)日:2024-06-13
申请号:US18076417
申请日:2022-12-07
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Han-Chee YEN , Ying-Nan LIU , Min-Yao CHENG , Eelco BERGMAN
CPC classification number: H01L23/5389 , G02B6/12004 , H01L21/4857 , H01L21/568 , H01L23/5383 , H01L24/19 , H01L24/20 , H01L25/167 , H01L25/18 , H01L25/50 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2224/16227 , H01L2224/2101 , H01L2224/32225 , H01L2224/73204
Abstract: An electronic device is disclosed. The electronic device includes a first component, a second component, and a first bridge component configured to electrically connect the first component with the second component. The first component is configured to transmit a first signal downwardly without passing the first bridge component and the second component is configured to transmit/receive a second signal to/from outside of the electronic device. A transmission speed of the second signal is higher than a transmission speed of the first signal.
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公开(公告)号:US20230400648A1
公开(公告)日:2023-12-14
申请号:US17838099
申请日:2022-06-10
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Han-Chee YEN , Min-Yao CHENG , Hung-Yi LIN
CPC classification number: G02B6/4246 , H01L25/167 , G02B6/428
Abstract: The present disclosure provides an electronic package. The electronic package includes a photonic component including a first input/output (I/O) port and a second I/O port both at a side of the photonic component. The electronic package also includes a connector disposed adjacent to the side of the photonic component and configured to guide a first light carrying medium to be optically coupled with at least one of the first I/O port and second I/O port of the photonic component.
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公开(公告)号:US20210296278A1
公开(公告)日:2021-09-23
申请号:US16825725
申请日:2020-03-20
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Han-Chee YEN , Ying-Nan LIU , Min-Yao CHENG
IPC: H01L23/00
Abstract: A semiconductor device package is provided. The semiconductor device package includes providing a first substrate, a computing unit and a power module. The first substrate has a first surface and a second surface opposite to the first surface. The computing unit is adjacent to the first surface. The computing unit includes a semiconductor die. The power module is adjacent to the second surface. The power module includes a power element and a passive element. Each of the semiconductor die, the power element, and the passive element is vertically arranged with respect to each other, and the passive elements are assembled between the semiconductor die and the power element.
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