公开(公告)号：US20220367304A1

公开(公告)日：2022-11-17

申请号：US17317770

申请日：2021-05-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kuoching CHENG ,  Yuan-Feng CHIANG ,  Ya Fang CHAN ,  Wen-Long LU ,  Shih-Yu WANG

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/16 ,  H01L23/538 ,  H01L21/56

Abstract: An electronic device package and a method for manufacturing an electronic device package are provided. The electronic device package includes electronic device structure which includes a first electronic device and a first encapsulant, a second electronic device, and a second encapsulant. The first encapsulant encapsulates the first electronic device. The second electronic device is adjacent to the electronic device structure. The second encapsulant encapsulates the electronic device structure and the second electronic device. A first extension line along a lateral surface of the first electronic device and a second extension line along a lateral surface of the first encapsulant define a first angle, the second extension line along the lateral surface of the first encapsulant and a third extension line along a lateral surface of the second electronic device define a second angle, and the first angle is different from the second angle.

公开(公告)号：US20190148297A1

公开(公告)日：2019-05-16

申请号：US15815351

申请日：2017-11-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Cheng-Lin HO ,  Chung Chieh CHANG ,  Ya Fang CHAN ,  Chih-Cheng LEE

IPC: H01L23/535 ,  H01L21/02

Abstract: At least some embodiments of the present disclosure relate to a substrate for packaging a semiconductor device package. The substrate comprises a dielectric layer, a first conductive element adjacent to the dielectric layer, a second conductive element adjacent to the dielectric layer, and a third conductive element adjacent to the dielectric layer. The first conductive element has a first central axis in a first direction and a second central axis in a second direction. The first conductive element comprises a first chamfer and a second chamfer adjacent to the first chamfer. The second conductive element has a first central axis in the first direction and a second central axis in the second direction. The third conductive element has a first central axis in the first direction and a second central axis in the second direction. The first central axes of the first, second, and third conductive elements are substantially parallel to one another in the first direction and are misaligned from one another. The second central axes of the first and second conductive elements are substantially co-linear in the second direction. The second central axis of the third conductive element is substantially parallel to and misaligned from the second central axes of the first and second conductive elements. The first chamfer and the second chamfer are separated by at least one of the first central axis and the second central axis of the first conductive element and are substantially asymmetric.

公开(公告)号：US20250029940A1

公开(公告)日：2025-01-23

申请号：US18904052

申请日：2024-10-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Yuan-Feng CHIANG ,  Po-Wei LU

IPC: H01L23/66 ,  H01L21/56 ,  H01L21/768 ,  H01L23/31 ,  H01L23/495

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.

公开(公告)号：US20230094668A1

公开(公告)日：2023-03-30

申请号：US18076382

申请日：2022-12-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Yuan-Feng CHIANG

IPC: H01L25/00 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/762

Abstract: A semiconductor device package includes a redistribution layer, a plurality of conductive pillars, a reinforcing layer and an encapsulant. The conductive pillars are in direct contact with the first redistribution layer. The reinforcing layer surrounds a lateral surface of the conductive pillars. The encapsulant encapsulates the first redistribution layer and the reinforcing layer. The conductive pillars are separated from each other by the reinforcing layer.

公开(公告)号：US20210225783A1

公开(公告)日：2021-07-22

申请号：US16745331

申请日：2020-01-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Yuan-Feng CHIANG ,  Po-Wei LU

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56 ,  H01L21/768

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.

公开(公告)号：US20240249958A1

公开(公告)日：2024-07-25

申请号：US18099867

申请日：2023-01-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Cong-Wei CHEN ,  Kuoching CHENG ,  Shih-Yu WANG

IPC: H01L21/67 ,  H01L21/683

CPC classification number: H01L21/67092 ,  H01L21/6838

Abstract: A method for manufacturing a semiconductor package and an apparatus for flattening a workpiece are provided. The method includes providing a panel over a stage, wherein the panel includes a lower surface facing the stage and an upper surface opposite to the lower surface; applying a first force to a first region of the upper surface of the panel along at least one direction from the panel toward the stage; and transferring the first force from the first region to a second region of the upper surface of the panel different from the first region.

公开(公告)号：US20210183723A1

公开(公告)日：2021-06-17

申请号：US16717933

申请日：2019-12-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Yuan-Feng CHIANG ,  Po-Wei LU

IPC: H01L23/367 ,  H01L23/433 ,  H01L21/48 ,  H01L21/768 ,  H01L25/00 ,  H01L25/065

Abstract: A semiconductor heat dissipation structure includes a first semiconductor device including a first active surface and a first back surface opposite to the first active surface, a second semiconductor device including a second active surface and a second back surface opposite to the second active surface, a first heat conductive layer embedded in the first back surface of the first semiconductor device, a second heat conductive layer embedded in the second back surface of the second semiconductor device, and a third heat conductive layer disposed adjoining the first heat conductive layer and extending to the first active surface of the first semiconductor device. The first back surface of the first semiconductor device and the second back surface of the second semiconductor device are in contact with each other. At least a portion of the first heat conductive layer are in contact with the second heat conductive layer.

公开(公告)号：US20210134781A1

公开(公告)日：2021-05-06

申请号：US16675011

申请日：2019-11-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Yuan-Feng CHIANG

IPC: H01L25/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/762 ,  H01L21/56 ,  H01L23/00

Abstract: A semiconductor device package includes a redistribution layer, a plurality of conductive pillars, a reinforcing layer and an encapsulant. The conductive pillars are in direct contact with the first redistribution layer. The reinforcing layer surrounds a lateral surface of the conductive pillars. The encapsulant encapsulates the first redistribution layer and the reinforcing layer. The conductive pillars are separated from each other by the reinforcing layer.