公开(公告)号：US20180061767A1

公开(公告)日：2018-03-01

申请号：US15692947

申请日：2017-08-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yuan-Feng CHIANG ,  Cong-Wei CHEN ,  I-Ting CHI ,  Shao-An CHEN

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/29 ,  H01L21/56 ,  H01L21/48 ,  H01L21/78 ,  H01L23/00

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/78 ,  H01L23/295 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L25/065 ,  H01L2224/19 ,  H01L2224/214 ,  H01L2224/96

Abstract: A semiconductor package structure includes a semiconductor substrate, at least one semiconductor die, an encapsulant, a protection layer, a plurality of conductive elements and a redistribution layer. The semiconductor die is disposed on the semiconductor substrate. The encapsulant covers at least a portion of the semiconductor die, and has a first surface and a lateral surface. The protection layer covers the first surface and the lateral surface of the encapsulant. The conductive elements surround the lateral surface of the encapsulant. The redistribution layer electrically connects the semiconductor die and the conductive elements.

公开(公告)号：US20240249958A1

公开(公告)日：2024-07-25

申请号：US18099867

申请日：2023-01-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Cong-Wei CHEN ,  Kuoching CHENG ,  Shih-Yu WANG

IPC: H01L21/67 ,  H01L21/683

CPC classification number: H01L21/67092 ,  H01L21/6838

Abstract: A method for manufacturing a semiconductor package and an apparatus for flattening a workpiece are provided. The method includes providing a panel over a stage, wherein the panel includes a lower surface facing the stage and an upper surface opposite to the lower surface; applying a first force to a first region of the upper surface of the panel along at least one direction from the panel toward the stage; and transferring the first force from the first region to a second region of the upper surface of the panel different from the first region.