公开(公告)号：US20240128206A1

公开(公告)日：2024-04-18

申请号：US18530117

申请日：2023-12-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Peng YANG ,  Yuan-Feng CHIANG ,  Po-Wei LU

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/16 ,  H01L23/31 ,  H01L23/538

CPC classification number: H01L23/562 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/565 ,  H01L23/16 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/96 ,  H01L21/568 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/95001 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/15156 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/351 ,  H01L2924/3511

Abstract: A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.

公开(公告)号：US20180129062A1

公开(公告)日：2018-05-10

申请号：US15347675

申请日：2016-11-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yuan-Feng CHIANG ,  Tsung-Tang TSAI ,  Min Lung HUANG

IPC: G02B27/30

Abstract: According to various embodiments, a collimator includes a substrate defining a plurality of channels through the substrate. The substrate includes a first surface and a second surface opposite the first surface. Each of the channels includes a first aperture exposed from the first surface, a second aperture between the first surface and the second surface, and a third aperture exposed from the second surface. The first aperture and the third aperture are larger than the second aperture.

公开(公告)号：US20210183723A1

公开(公告)日：2021-06-17

申请号：US16717933

申请日：2019-12-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Yuan-Feng CHIANG ,  Po-Wei LU

IPC: H01L23/367 ,  H01L23/433 ,  H01L21/48 ,  H01L21/768 ,  H01L25/00 ,  H01L25/065

Abstract: A semiconductor heat dissipation structure includes a first semiconductor device including a first active surface and a first back surface opposite to the first active surface, a second semiconductor device including a second active surface and a second back surface opposite to the second active surface, a first heat conductive layer embedded in the first back surface of the first semiconductor device, a second heat conductive layer embedded in the second back surface of the second semiconductor device, and a third heat conductive layer disposed adjoining the first heat conductive layer and extending to the first active surface of the first semiconductor device. The first back surface of the first semiconductor device and the second back surface of the second semiconductor device are in contact with each other. At least a portion of the first heat conductive layer are in contact with the second heat conductive layer.

公开(公告)号：US20210134781A1

公开(公告)日：2021-05-06

申请号：US16675011

申请日：2019-11-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Yuan-Feng CHIANG

IPC: H01L25/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/762 ,  H01L21/56 ,  H01L23/00

Abstract: A semiconductor device package includes a redistribution layer, a plurality of conductive pillars, a reinforcing layer and an encapsulant. The conductive pillars are in direct contact with the first redistribution layer. The reinforcing layer surrounds a lateral surface of the conductive pillars. The encapsulant encapsulates the first redistribution layer and the reinforcing layer. The conductive pillars are separated from each other by the reinforcing layer.

公开(公告)号：US20190040527A1

公开(公告)日：2019-02-07

申请号：US15668632

申请日：2017-08-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chuan-Yung SHIH ,  Tai-Yuan HUANG ,  Yu-Chi WANG ,  Chin-Feng WANG ,  Sing-Syuan SHIAU ,  Chun-Wei SHIH ,  Shao-Ci HUANG ,  Huang-Hsien CHANG ,  Yuan-Feng CHIANG

IPC: C23C16/458 ,  H01L21/687 ,  H01L21/677

CPC classification number: C23C16/458 ,  C23C16/4404 ,  H01L21/02271 ,  H01L21/0262 ,  H01L21/28556 ,  H01L21/67126 ,  H01L21/6719 ,  H01L21/67742 ,  H01L21/67748 ,  H01L21/68785

Abstract: In one or more embodiments, an apparatus for processing a wafer includes a ceramic wall, a metal wall and a frame. The ceramic wall defines a chamber for accommodating the wafer. The ceramic wall has a first surface defining a first opening. The metal wall surrounds the ceramic wall. The metal wall has a second surface defining a second opening adjacent to the first opening. The frame covers the second surface.

公开(公告)号：US20180061776A1

公开(公告)日：2018-03-01

申请号：US15683698

申请日：2017-08-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Peng YANG ,  Yuan-Feng CHIANG ,  Po-Wei LU

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.

公开(公告)号：US20250029940A1

公开(公告)日：2025-01-23

申请号：US18904052

申请日：2024-10-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Yuan-Feng CHIANG ,  Po-Wei LU

IPC: H01L23/66 ,  H01L21/56 ,  H01L21/768 ,  H01L23/31 ,  H01L23/495

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.

公开(公告)号：US20240413115A1

公开(公告)日：2024-12-12

申请号：US18207090

申请日：2023-06-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Ling YEH ,  Yuan-Feng CHIANG ,  Chung-Hung LAI ,  Chin-Li KAO

IPC: H01L23/00 ,  H01L23/31

Abstract: A package structure is provided. The package structure includes an electronic component, an encapsulant, a first conductive pillar, a first dielectric layer. The electronic component has an active surface. The encapsulant encapsulates the electronic component and exposes the active surface of the electronic component. The first conductive pillar is over the active surface of the electronic component, wherein an upper surface of the first conductive pillar includes a concave portion. The first dielectric layer is over the encapsulant and the active surface of the electronic component, wherein the first dielectric layer defines an opening exposing the concave portion of the first conductive pillar.

公开(公告)号：US20230094668A1

公开(公告)日：2023-03-30

申请号：US18076382

申请日：2022-12-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Yuan-Feng CHIANG

IPC: H01L25/00 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/762

Abstract: A semiconductor device package includes a redistribution layer, a plurality of conductive pillars, a reinforcing layer and an encapsulant. The conductive pillars are in direct contact with the first redistribution layer. The reinforcing layer surrounds a lateral surface of the conductive pillars. The encapsulant encapsulates the first redistribution layer and the reinforcing layer. The conductive pillars are separated from each other by the reinforcing layer.

公开(公告)号：US20210225783A1

公开(公告)日：2021-07-22

申请号：US16745331

申请日：2020-01-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ya Fang CHAN ,  Yuan-Feng CHIANG ,  Po-Wei LU

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56 ,  H01L21/768

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.