公开(公告)号：US20240077932A1

公开(公告)日：2024-03-07

申请号：US18122410

申请日：2023-03-16

Applicant: Apple Inc.

Inventor： Talbott M. Houk ,  Wenxun Huang ,  Nikola Jovanovic ,  Floyd L. Dankert ,  Sanjay Pant ,  Alessandro Molari ,  Siarhei Meliukh ,  Nicola Florio ,  Ludmil N. Nikolov ,  Nathan F. Hanagami ,  Hartmut Sturm ,  Di Zhao ,  Chad L. Olson ,  John J. Sullivan ,  Seyedeh Maryam Mortazavi Zanjani ,  Tristan R. Hudson ,  Jay B. Fletcher ,  Jonathan A. Dutra

IPC: G06F1/3296 ,  G06F1/3212 ,  G06F1/3234

CPC classification number: G06F1/3296 ,  G06F1/3212 ,  G06F1/3278

Abstract: The present disclosure describes a system with a power management device, a wakeup circuit, a battery management device, and a connector. During a powered down mode of operation, the battery management device can provide, via the connector, a bias voltage to the wakeup circuit. In response to a wakeup switch being activated, the battery management device can provide a power supply (e.g., from a battery) to the power management device. Benefits of the wakeup circuit include (1) a reduction of battery consumption—and thus improving battery lifetime—when the electronic system is in a powered down mode of operation because the wakeup circuit has lower number of active components compared to other designs and (2) a non-complex wakeup circuit design because one or more existing connector interconnects between the power management device and the battery management device can be re-used during electronic system's powered down mode of operation.

公开(公告)号：US20210288648A1

公开(公告)日：2021-09-16

申请号：US16820659

申请日：2020-03-16

Applicant: Apple Inc.

Inventor： Nathan F. Hanagami ,  Hao Zhou ,  Jianbao Wang ,  Ruopeng Wang ,  Ludmil N. Nikolov

IPC: H03K19/0185 ,  H03K19/003 ,  H03K19/173 ,  H03K19/21 ,  H03K19/017

Abstract: A level shifter circuit with an intermediate power domain and method for operating the same is disclosed. The level shifter circuit includes an input circuit, an output circuit, and an intermediate circuit. The input circuit is coupled to receive an input signal from a first voltage domain operating according to a first supply voltage, and generates a first intermediate signal. The intermediate circuit receives the first intermediate signal and generates a second intermediate signal. The output circuit receives the intermediate signal and provides an output signal into a second voltage domain operating at a second supply voltage different from the first. A voltage multiplexer is configured to provide one of the first or second supply voltages to the intermediate circuit depending on a state of the input signal.

公开(公告)号：US20240241571A1

公开(公告)日：2024-07-18

申请号：US18622502

申请日：2024-03-29

Applicant: Apple Inc.

Inventor： Shawn Searles ,  Sanjay Pant ,  Ludmil N. Nikolov ,  Tiago Filipe Galhoz Patrao ,  Enrico Zanetti ,  Hao Zhou ,  Vincenzo Bisogno

IPC: G06F1/3296 ,  H02M1/00 ,  H02M3/157

CPC classification number: G06F1/3296 ,  H02M1/0006 ,  H02M1/0025 ,  H02M1/007 ,  H02M3/157

Abstract: A power delivery system included in a computer system uses multiple power converter circuits to generate respective voltage levels on multiple power supply nodes. An embodiment of the power delivery system includes an input power converter circuit that generates a voltage level for use by host and follower power converter circuits. The host power converter circuit generates an external demand current that is shared by multiple follower power converter circuits to regulate the voltage level on the multiple power supply nodes. The power delivery system can be scaled to different platforms of the computer system by adjusting the number of follower power converter circuits.

公开(公告)号：US11983063B2

公开(公告)日：2024-05-14

申请号：US17823949

申请日：2022-08-31

Applicant: Apple Inc.

Inventor： Shawn Searles ,  Sanjay Pant ,  Ludmil N. Nikolov ,  Tiago Filipe Galhoz Patrao ,  Enrico Zanetti ,  Hao Zhou ,  Vincenzo Bisogno

IPC: G06F1/32 ,  G06F1/3296 ,  H02M1/00 ,  H02M3/157

CPC classification number: G06F1/3296 ,  H02M1/0006 ,  H02M1/0025 ,  H02M1/007 ,  H02M3/157

Abstract: A power delivery system included in a computer system using multiple power converter circuits to generate respective voltage levels on multiple power supply nodes. The power delivery system includes a step-down power converter circuit that generates a voltage level for use by host and follower power converter circuits. The host power converter circuit generates an external demand current that is shared by multiple follower power converter circuits to regulate the voltage level on the multiple power supply nodes. The power delivery system can be scaled to different platforms of the computer system by adjusting the number of follower power converter circuits.

公开(公告)号：US20240069621A1

公开(公告)日：2024-02-29

申请号：US17823949

申请日：2022-08-31

Applicant: Apple Inc.

Inventor： Shawn Searles ,  Sanjay Pant ,  Ludmil N. Nikolov ,  Tiago Filipe Galhoz Patrao ,  Enrico Zanetti ,  Hao Zhou ,  Vincenzo Bisogno

IPC: G06F1/3296 ,  H02M1/00 ,  H02M3/157

CPC classification number: G06F1/3296 ,  H02M1/0006 ,  H02M1/0025 ,  H02M1/007 ,  H02M3/157

Abstract: A power delivery system included in a computer system using multiple power converter circuits to generate respective voltage levels on multiple power supply nodes. The power delivery system includes a step-down power converter circuit that generates a voltage level for use by host and follower power converter circuits. The host power converter circuit generates an external demand current that is shared by multiple follower power converter circuits to regulate the voltage level on the multiple power supply nodes. The power delivery system can be scaled to different platforms of the computer system by adjusting the number of follower power converter circuits.

公开(公告)号：US11128300B1

公开(公告)日：2021-09-21

申请号：US16820659

申请日：2020-03-16

Applicant: Apple Inc.

Inventor： Nathan F. Hanagami ,  Hao Zhou ,  Jianbao Wang ,  Ruopeng Wang ,  Ludmil N. Nikolov

IPC: H03L5/00 ,  H03K19/0185 ,  H03K19/003 ,  H03K19/017 ,  H03K19/21 ,  H03K19/173

Abstract: A level shifter circuit with an intermediate power domain and method for operating the same is disclosed. The level shifter circuit includes an input circuit, an output circuit, and an intermediate circuit. The input circuit is coupled to receive an input signal from a first voltage domain operating according to a first supply voltage, and generates a first intermediate signal. The intermediate circuit receives the first intermediate signal and generates a second intermediate signal. The output circuit receives the intermediate signal and provides an output signal into a second voltage domain operating at a second supply voltage different from the first. A voltage multiplexer is configured to provide one of the first or second supply voltages to the intermediate circuit depending on a state of the input signal.