Power sense correction for power budget estimator

    公开(公告)号:US11675409B2

    公开(公告)日:2023-06-13

    申请号:US17812086

    申请日:2022-07-12

    Applicant: Apple Inc.

    CPC classification number: G06F1/28 G06F1/3228 G06Q50/06

    Abstract: An apparatus includes an execute circuit configured to execute a plurality of operations received from a queue, as well as a power estimator circuit, and a power sensing circuit. The power estimator circuit is configured to predict power consumption due to execution of a particular operation of the plurality of operations, and to withdraw, based on the predicted power consumption, a first amount of power credits from a power credit pool. The power sensing circuit is configured to monitor one or more characteristics of a power supply node coupled to the execute circuit to generate a power value, and to deposit a second amount of power credits into the power credit pool. The second amount of power credits may be based on the power value indicating that power consumed during the execution of the particular operation is less than the predicted power consumption.

    Debug Trace of Cache Memory Requests

    公开(公告)号:US20230061419A1

    公开(公告)日:2023-03-02

    申请号:US17538939

    申请日:2021-11-30

    Applicant: Apple Inc.

    Abstract: An apparatus includes a plurality of processor circuits, a cache memory circuit, and a trace control circuit. The trace control circuit may be configured, in response to activation of a mode to record information indicative of program execution of at least one processor circuit of the plurality of processor circuits, to monitor memory requests transmitted between ones of the plurality of processor circuits and the cache memory circuit, and then to select a particular memory request of monitored memory requests using an arbitration algorithm. The trace control circuit may be further configured to allocate space in a trace buffer to the particular memory request, and to store, in the trace buffer, information associated with the particular memory request.

    Adaptive Thermal Control System
    3.
    发明申请

    公开(公告)号:US20220075343A1

    公开(公告)日:2022-03-10

    申请号:US17012611

    申请日:2020-09-04

    Applicant: Apple Inc.

    Abstract: Systems, apparatuses, and methods for implementing an optimized adaptive thermal control mechanism for an integrated circuit (IC) are described. A control unit receives a digital input value which is representative of a temperature of an IC. The control unit compares the input value to at least two set points. A result of a first comparison determines whether an accumulator is incremented or decremented by a programmable gain value. A result of a second comparison determines whether the accumulator is primed with a preset ramp-up value. The preset ramp-up value is used since the accumulator can take several sensing cycles to reach the optimal control value while thermal gradients can become critical in only a few cycles. The output of the accumulator is provided to an actuator which adjusts parameter(s) to modulate the IC's temperature. The granularity and range of the accumulator matches the granularity and range of the actuator.

    Power Sense Correction for Power Budget Estimator

    公开(公告)号:US20220342471A1

    公开(公告)日:2022-10-27

    申请号:US17812086

    申请日:2022-07-12

    Applicant: Apple Inc.

    Abstract: An apparatus includes an execute circuit configured to execute a plurality of operations received from a queue, as well as a power estimator circuit, and a power sensing circuit. The power estimator circuit is configured to predict power consumption due to execution of a particular operation of the plurality of operations, and to withdraw, based on the predicted power consumption, a first amount of power credits from a power credit pool. The power sensing circuit is configured to monitor one or more characteristics of a power supply node coupled to the execute circuit to generate a power value, and to deposit a second amount of power credits into the power credit pool. The second amount of power credits may be based on the power value indicating that power consumed during the execution of the particular operation is less than the predicted power consumption.

    POWER DROOP MEASUREMENTS USING ANALOG-TO-DIGITAL CONVERTER DURING TESTING

    公开(公告)号:US20200319248A1

    公开(公告)日:2020-10-08

    申请号:US16375344

    申请日:2019-04-04

    Applicant: Apple Inc.

    Abstract: An apparatus includes a functional circuit, including a power supply node, and a test circuit. The functional circuit is configured to operate in a test mode that includes generating respective test output patterns in response to application of a plurality of test stimulus patterns. The test circuit is configured to identify a particular test stimulus pattern of the plurality of test stimulus patterns, and to reapply the particular test stimulus pattern to the functional circuit multiple times. The test circuit is further configured to vary, for each reapplication, a start time of the particular test stimulus pattern in relation to when a voltage level of the power supply node is sampled for that reapplication.

    Active Peak Power Management of a High Performance Embedded Microprocessor Cluster
    6.
    发明申请
    Active Peak Power Management of a High Performance Embedded Microprocessor Cluster 有权
    高性能嵌入式微处理器集群的主动峰值功率管理

    公开(公告)号:US20150006916A1

    公开(公告)日:2015-01-01

    申请号:US13929331

    申请日:2013-06-27

    Applicant: Apple Inc.

    CPC classification number: G06F1/26 H02J1/02 H02J1/10 H02J7/345 Y10T307/527

    Abstract: In some embodiments, a system may include at least one voltage controller. At least one of the voltage controllers may assess, during use, an occurrence of a predetermined condition. In some embodiments, the system may include an at least first capacitor. The at least first capacitor may be coupled to at least one of the voltage controllers such that at least one of the voltage controllers engages the at least first capacitor to supply additional current when the predetermined condition occurs. When the increase in current is no longer required the at least first capacitor may be disengaged. The at least first capacitor may be charged when disengaged until a predetermined capacity.

    Abstract translation: 在一些实施例中,系统可以包括至少一个电压控制器。 至少一个电压控制器可以在使用期间评估预定条件的发生。 在一些实施例中,系统可以包括至少第一电容器。 至少第一电容器可以耦合到至少一个电压控制器,使得当预定条件发生时,至少一个电压控制器接合至少第一电容器以提供附加电流。 当电流的增加不再需要时,可以使至少第一电容器分离。 至少第一电容器可以在分离直到预定容量时被充电。

    Power sense correction for power budget estimator

    公开(公告)号:US11416056B2

    公开(公告)日:2022-08-16

    申请号:US17026121

    申请日:2020-09-18

    Applicant: Apple Inc.

    Abstract: An apparatus includes an execute circuit configured to execute a plurality of operations received from a queue, as well as a power estimator circuit, and a power sensing circuit. The power estimator circuit is configured to predict power consumption due to execution of a particular operation of the plurality of operations, and to withdraw, based on the predicted power consumption, a first amount of power credits from a power credit pool. The power sensing circuit is configured to monitor one or more characteristics of a power supply node coupled to the execute circuit to generate a power value, and to deposit a second amount of power credits into the power credit pool. The second amount of power credits may be based on the power value indicating that power consumed during the execution of the particular operation is less than the predicted power consumption.

    Integrated Characterization Circuit
    8.
    发明申请
    Integrated Characterization Circuit 审中-公开
    综合表征电路

    公开(公告)号:US20170052219A1

    公开(公告)日:2017-02-23

    申请号:US14829392

    申请日:2015-08-18

    Applicant: Apple Inc.

    Abstract: In an embodiment, an integrated circuit includes a first circuit and a characterization circuit to capture a histogram of the supply voltage magnitude to the first circuit (or other characteristics of the first circuit). In various embodiments, the characterization circuit may: be located near the first circuit; include a sample/hold circuit that may sample the supply voltage in a short window of time and an ADC that is configured to converge to the sampled voltage over multiple orders of magnitude longer than the short window; be relatively small and low power; capture multiple histograms, e.g. one for each mode of the first circuit; support a blackout interval during mode changes; support a zoom feature to a subrange of supply voltage disabled with fine-grain histogram buckets; and/or include one or more comparators to detect maximum and/or minimum voltages experienced over a time interval.

    Abstract translation: 在一个实施例中,集成电路包括第一电路和表征电路,以捕获与第一电路(或第一电路的其他特性)的电源电压幅度的直方图。 在各种实施例中,表征电路可以:位于第一电路附近; 包括可以在短时间内对电源电压进行采样的采样/保持电路和被配置为在比短时间长度多于多个数量级上会聚到采样电压的ADC; 相对较小,功率较低; 捕获多个直方图,例如 一个用于第一电路的每个模式; 在模式更改期间支持停电间隔; 支持缩放功能到细粒度直方图桶禁用的电源电压范围; 和/或包括一个或多个比较器,以检测经过一段时间间隔的最大和/或最小电压。

    Active peak power management of a high performance embedded microprocessor cluster
    9.
    发明授权
    Active peak power management of a high performance embedded microprocessor cluster 有权
    高性能嵌入式微处理器集群的主动峰值功耗管理

    公开(公告)号:US09454196B2

    公开(公告)日:2016-09-27

    申请号:US13929331

    申请日:2013-06-27

    Applicant: Apple Inc.

    CPC classification number: G06F1/26 H02J1/02 H02J1/10 H02J7/345 Y10T307/527

    Abstract: In some embodiments, a system may include at least one voltage controller. At least one of the voltage controllers may assess, during use, an occurrence of a predetermined condition. In some embodiments, the system may include an at least first capacitor. The at least first capacitor may be coupled to at least one of the voltage controllers such that at least one of the voltage controllers engages the at least first capacitor to supply additional current when the predetermined condition occurs. When the increase in current is no longer required the at least first capacitor may be disengaged. The at least first capacitor may be charged when disengaged until a predetermined capacity.

    Abstract translation: 在一些实施例中,系统可以包括至少一个电压控制器。 至少一个电压控制器可以在使用期间评估预定条件的发生。 在一些实施例中,系统可以包括至少第一电容器。 至少第一电容器可以耦合到至少一个电压控制器,使得当预定条件发生时,至少一个电压控制器接合至少第一电容器以提供附加电流。 当电流的增加不再需要时,可以使至少第一电容器分离。 至少第一电容器可以在分离直到预定容量时被充电。

    Debug Trace of Cache Memory Requests
    10.
    发明公开

    公开(公告)号:US20230418724A1

    公开(公告)日:2023-12-28

    申请号:US18344170

    申请日:2023-06-29

    Applicant: Apple Inc.

    CPC classification number: G06F11/348 G06F11/3037 G06F12/0223 G06F2212/1008

    Abstract: An apparatus includes a plurality of processor circuits, a cache memory circuit, and a trace control circuit. The trace control circuit may be configured, in response to activation of a mode to record information indicative of program execution of at least one processor circuit of the plurality of processor circuits, to monitor memory requests transmitted between ones of the plurality of processor circuits and the cache memory circuit, and then to select a particular memory request of monitored memory requests using an arbitration algorithm. The trace control circuit may be further configured to allocate space in a trace buffer to the particular memory request, and to store, in the trace buffer, information associated with the particular memory request.

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