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公开(公告)号:US11861110B1
公开(公告)日:2024-01-02
申请号:US17956715
申请日:2022-09-29
Applicant: Apple Inc.
Inventor: Rungrot Kitsomboonloha , Donggeon Han , Jason N Gomez , Kyung Wook Kim , Nikolaus Hammler , Pei-En Chang , Saman Saeedi , Shih Chang Chang , Shinya Ono , Suk Won Hong , Szu-Hsien Lee , Victor H Yin , Young-Jik Jo , Yu-Heng Cheng , Joyan G Sanctis , Hongwoo Lee
CPC classification number: G06F3/04182 , G06F3/044 , H10K59/40 , G06F3/0412 , G06F2203/04107 , G06F2203/04112
Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The shielding layers may include shielding structures such as a conductive mesh structure and/or a transparent conductive film. The shielding structures may be actively driven or passively biased. In the active driving scheme, one or more inverting circuits may receive a noise signal from a cathode layer in the display and/or from the shielding structures, invert the received noise signal, and drive the inverted noise signal back onto the shielding structures to prevent any noise from the display from negatively impacting the performance of the touch sensors. In the passive biasing scheme, the shielding structures may be biased to a power supply voltage.
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公开(公告)号:US20240086014A1
公开(公告)日:2024-03-14
申请号:US18514934
申请日:2023-11-20
Applicant: Apple Inc.
Inventor: Rungrot Kitsomboonloha , Donggeon Han , Jason N Gomez , Kyung Wook Kim , Nikolaus Hammler , Pei-En Chang , Saman Saeedi , Shih Chang Chang , Shinya Ono , Suk Won Hong , Szu-Hsien Lee , Victor H Yin , Young-Jik Jo , Yu-Heng Cheng , Joyan G Sanctis , Hongwoo Lee
CPC classification number: G06F3/04182 , G06F3/044 , H10K59/40 , G06F3/0412 , G06F2203/04107 , G06F2203/04112
Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The shielding layers may include shielding structures such as a conductive mesh structure and/or a transparent conductive film. The shielding structures may be actively driven or passively biased. In the active driving scheme, one or more inverting circuits may receive a noise signal from a cathode layer in the display and/or from the shielding structures, invert the received noise signal, and drive the inverted noise signal back onto the shielding structures to prevent any noise from the display from negatively impacting the performance of the touch sensors. In the passive biasing scheme, the shielding structures may be biased to a power supply voltage.
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公开(公告)号:US20200074912A1
公开(公告)日:2020-03-05
申请号:US16234127
申请日:2018-12-27
Applicant: Apple Inc.
Inventor: Rungrot Kitsomboonloha , Szu-Hsien Lee
IPC: G09G3/20 , G09G3/3266 , G09G3/36
Abstract: The disclosure is related to head-to-head (H2H) gate on arrays (GOA) for pixel-based displays that may have reduced dimensions. In the described embodiments, the H2H design with alternate logic may be used to drive groups of pixels (e.g., a pixel row or column) with a primary and a secondary driver, located in opposite ends of the bezel of the electronic device. In the alternate-logic design, a shared shift-register may be used to enable two rows or columns. Embodiments in which more than two rows or columns are controlled by a single shift register are also described.
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公开(公告)号:US09727165B2
公开(公告)日:2017-08-08
申请号:US14677531
申请日:2015-04-02
Applicant: Apple Inc.
Inventor: Rungrot Kitsomboonloha , Chun-Yao Huang , Shih Chang Chang , Szu-Hsien Lee
CPC classification number: G06F3/0416 , G09G3/3677 , G09G2310/0202 , G09G2310/0218 , G09G2310/0267 , G09G2320/043
Abstract: A display may have an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The gate driver circuitry may include blocks of gate driver circuits each having an output coupled to a respective one of the gate lines. The gate driver circuits of each block are coupled in a chain to form a shift register. Each block has a local block-level gate start pulse generator. The display driver circuitry has a display driver circuit that supplies a gate start pulse clock to each of the local block-level gate start pulse generators. The local block-level gate start pulse generators create gate start pulses that are applied to the first gate driver circuit in each shift register. The display driver circuit may delay the gate start pulse clock when it is desired to implement an intraframe pause.
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公开(公告)号:US11922887B1
公开(公告)日:2024-03-05
申请号:US17368472
申请日:2021-07-06
Applicant: Apple Inc.
Inventor: Shinya Ono , Chin-Wei Lin , Chuan-Jung Lin , Gihoon Choo , Hassan Edrees , Hei Kam , Jung Yen Huang , Pei-En Chang , Rungrot Kitsomboonloha , Szu-Hsien Lee , Zino Lee
IPC: G09G3/3275 , H10K59/121 , H10K59/126 , H10K59/131
CPC classification number: G09G3/3275 , H10K59/1213 , H10K59/1216 , H10K59/126 , H10K59/131 , G09G2320/0214
Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to associated thin-film transistors. The diode may be coupled to drive transistor circuitry, a data loading transistor, and emission transistors. The drive transistor circuitry may include at least two transistor portions connected in series. The data loading transistor has a drain region connected to a data line and a source region connected directly to the drive transistor circuitry. The data line may be connected to and overlap the drain region of the data loading transistor. The data line and the source region of the data loading transistor are non-overlapping to reduce row-to-row crosstalk.
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公开(公告)号:US20230089942A1
公开(公告)日:2023-03-23
申请号:US17889242
申请日:2022-08-16
Applicant: Apple Inc.
Inventor: Yao Shi , Wei H Yao , Hyunwoo Nho , Jie Won Ryu , Kingsuk Brahma , Li-Xuan Chuo , Hyunsoo Kim , Myungjoon Choi , Ce Zhang , Alex H Pai , Shengkui Gao , Rungrot Kitsomboonloha , Shatam Agarwal , Vehbi Calayir , Chaohao Wang , Steven N Hanna , Pei-En Chang
IPC: G09G3/20
Abstract: This disclosure provides various techniques for providing fine-grain digital and analog pixel compensation to account for voltage error across an electronic display. By employing a two-dimensional digital compensation and a local analog compensation, a fine-grain and robust pixel compensation scheme may be provided to the electronic display.
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公开(公告)号:US20230014107A1
公开(公告)日:2023-01-19
申请号:US17749045
申请日:2022-05-19
Applicant: Apple Inc.
Inventor: Rungrot Kitsomboonloha , Chin-Wei Lin , Shinya Ono , Gihoon Choo , Hao-Lin Chiu , Kyung Wook Kim , Pei-En Chang , Szu-Hsien Lee , Zino Lee
IPC: G09G3/3225
Abstract: A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a logic sub-circuit and an output buffer sub-circuit. The output buffer sub-circuit may include depletion mode semiconducting oxide transistors with high mobility. The logic sub-circuit may include semiconducting oxide transistors, some of which can be depletion mode transistors and some of which can be enhancement mode transistors with lower mobility. The logic sub-circuit may include at least a carry circuit, a voltage setting circuit, an inverting circuit, a discharge circuit.
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公开(公告)号:US11462608B2
公开(公告)日:2022-10-04
申请号:US17143939
申请日:2021-01-07
Applicant: Apple Inc.
Inventor: Shinya Ono , Chin-Wei Lin , Akira Matsudaira , Jiun-Jye Chang , Jung Yen Huang , Pei-En Chang , Rungrot Kitsomboonloha , Szu-Hsien Lee
IPC: G09G3/3225 , G09G3/3266 , H01L27/32 , H01L29/786 , H01L27/12 , H01L29/49
Abstract: An electronic device may include a display with pixels formed using light-emitting diodes, thin-film silicon transistors, thin-film semiconducting-oxide transistors, and capacitors. The silicon transistors, semiconducting-transistors, and capacitors may have control terminals that are coupled to gate or routing lines that extend across the face of the display and that are formed in a low resistance source-drain metal routing layer. Forming routing/gate lines using the low resistance source-drain metal routing layer dramatically reduces the resistance of the gate lines, which enables better timing margins for large display panels operating at higher refresh rates.
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公开(公告)号:US10769982B2
公开(公告)日:2020-09-08
申请号:US16234127
申请日:2018-12-27
Applicant: Apple Inc.
Inventor: Rungrot Kitsomboonloha , Szu-Hsien Lee
IPC: G09G3/20 , G09G3/3266 , G09G3/36
Abstract: The disclosure is related to head-to-head (H2H) gate on arrays (GOA) for pixel-based displays that may have reduced dimensions. In the described embodiments, the H2H design with alternate logic may be used to drive groups of pixels (e.g., a pixel row or column) with a primary and a secondary driver, located in opposite ends of the bezel of the electronic device. In the alternate-logic design, a shared shift-register may be used to enable two rows or columns. Embodiments in which more than two rows or columns are controlled by a single shift register are also described.
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公开(公告)号:US12293042B2
公开(公告)日:2025-05-06
申请号:US18514934
申请日:2023-11-20
Applicant: Apple Inc.
Inventor: Rungrot Kitsomboonloha , Donggeon Han , Jason N Gomez , Kyung Wook Kim , Nikolaus Hammler , Pei-En Chang , Saman Saeedi , Shih Chang Chang , Shinya Ono , Suk Won Hong , Szu-Hsien Lee , Victor H Yin , Young-Jik Jo , Yu-Heng Cheng , Joyan G Sanctis , Hongwoo Lee
Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The shielding layers may include shielding structures such as a conductive mesh structure and/or a transparent conductive film. The shielding structures may be actively driven or passively biased. In the active driving scheme, one or more inverting circuits may receive a noise signal from a cathode layer in the display and/or from the shielding structures, invert the received noise signal, and drive the inverted noise signal back onto the shielding structures to prevent any noise from the display from negatively impacting the performance of the touch sensors. In the passive biasing scheme, the shielding structures may be biased to a power supply voltage.
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