ALTERNATE-LOGIC HEAD-TO-HEAD GATE DRIVER ON ARRAY

    公开(公告)号:US20200074912A1

    公开(公告)日:2020-03-05

    申请号:US16234127

    申请日:2018-12-27

    Applicant: Apple Inc.

    Abstract: The disclosure is related to head-to-head (H2H) gate on arrays (GOA) for pixel-based displays that may have reduced dimensions. In the described embodiments, the H2H design with alternate logic may be used to drive groups of pixels (e.g., a pixel row or column) with a primary and a secondary driver, located in opposite ends of the bezel of the electronic device. In the alternate-logic design, a shared shift-register may be used to enable two rows or columns. Embodiments in which more than two rows or columns are controlled by a single shift register are also described.

    Display with driver circuitry having intraframe pause capabilities

    公开(公告)号:US09727165B2

    公开(公告)日:2017-08-08

    申请号:US14677531

    申请日:2015-04-02

    Applicant: Apple Inc.

    Abstract: A display may have an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The gate driver circuitry may include blocks of gate driver circuits each having an output coupled to a respective one of the gate lines. The gate driver circuits of each block are coupled in a chain to form a shift register. Each block has a local block-level gate start pulse generator. The display driver circuitry has a display driver circuit that supplies a gate start pulse clock to each of the local block-level gate start pulse generators. The local block-level gate start pulse generators create gate start pulses that are applied to the first gate driver circuit in each shift register. The display driver circuit may delay the gate start pulse clock when it is desired to implement an intraframe pause.

    Alternate-logic head-to-head gate driver on array

    公开(公告)号:US10769982B2

    公开(公告)日:2020-09-08

    申请号:US16234127

    申请日:2018-12-27

    Applicant: Apple Inc.

    Abstract: The disclosure is related to head-to-head (H2H) gate on arrays (GOA) for pixel-based displays that may have reduced dimensions. In the described embodiments, the H2H design with alternate logic may be used to drive groups of pixels (e.g., a pixel row or column) with a primary and a secondary driver, located in opposite ends of the bezel of the electronic device. In the alternate-logic design, a shared shift-register may be used to enable two rows or columns. Embodiments in which more than two rows or columns are controlled by a single shift register are also described.

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