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    Read/write control method and device for DDR dynamic random access memory, and system
    1.
    发明授权
    Read/write control method and device for DDR dynamic random access memory, and system 有权

    公开(公告)号：US12158851B2

    公开(公告)日：2024-12-03

    申请号：US18136183

    申请日：2023-04-18

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Xitong Ma

    IPC: G06F13/16 ,  G06F13/24

    Abstract: The disclosure provides a read/write control method and device for a DDR (Double Data Rate) dynamic random access memory, and a system. The device includes a read control signal generating unit and a read memory controller, and the read control signal generating unit is in signal connection with the read memory controller; the read control signal generating unit is configured for determining a minimum frame period from a plurality of received signal sources, generating a read control signal based on a delay time, and providing the read control signal to the read memory controller; and the read memory controller is configured for controlling the reading of video frames from the DDR dynamic random access memory according to the read control signal.

    Data processing method, data processing device, and display apparatus with a backlight module using an optical diffusion coefficient
    2.
    发明授权
    Data processing method, data processing device, and display apparatus with a backlight module using an optical diffusion coefficient 有权

    公开(公告)号：US12131711B2

    公开(公告)日：2024-10-29

    申请号：US17797276

    申请日：2021-06-09

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Xitong Ma

    IPC: G09G3/34

    CPC classification number: G09G3/3426 ,  G09G2320/0233 ,  G09G2320/0276 ,  G09G2320/0626 ,  G09G2330/021 ,  G09G2360/16

    Abstract: A data processing method spoiled to a display apparatus includes, obtaining first image data including first pixel values of pixels; obtaining a brightness control value of each backlight unit according to first pixel values of pixels corresponding to the backlight unit; determining relative positional relationships between a first pixel and at least two first backlight units in a plane perpendicular to a thickness direction of the display apparatus, the first backlight units including a backlight unit corresponding to the first pixel and backlight unit(s) adjacent thereto; determining an optical diffusion coefficient of each first backlight unit at a corresponding position of the first pixel according to the relative positional relationships; and determining a backlight brightness characteristic value of the first pixel according to a brightness control value of each first backlight unit and the optical diffusion coefficient of each first backlight unit at the corresponding position of the first pixel.

    Time code display system and method, displaying device, storage medium and electronic apparatus
    3.
    发明授权
    Time code display system and method, displaying device, storage medium and electronic apparatus 有权

    公开(公告)号：US11587274B2

    公开(公告)日：2023-02-21

    申请号：US17515178

    申请日：2021-10-29

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Xitong Ma ,  Lihua Geng ,  Ran Duan

    IPC: H04N5/06 ,  H04N5/46 ,  G06T11/60 ,  G09G5/00 ,  G09G5/377

    Abstract: A time code display system comprising: a video receiver configured for receiving a plurality of non-homologous video signals; a time code parser connected with the video receiver and configured for extracting time code data of each video frame from each video signal; a write controller and a buffer, the write controller being connected with the video receiver and the time code parser; a synchronous clock component configured for generating a local clock signal according to a channel associated clock signal of any video signal; and a read controller and a display, the read controller being connected with the synchronous clock component and the buffer and configured for reading out the video frame of each video signal and the time code data corresponding to the video frame from the buffer at the same time, according to the local clock signal.

    Switching method and switching device for display channel, display driving device and display device
    4.
    发明授权
    Switching method and switching device for display channel, display driving device and display device 有权

    公开(公告)号：US11574614B2

    公开(公告)日：2023-02-07

    申请号：US16945243

    申请日：2020-07-31

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Xitong Ma ,  Lihua Geng ,  Xianzhen Li ,  Donglei Mu

    IPC: G09G5/39 ,  G09G5/397 ,  G09G3/20

    Abstract: The present disclosure provides a method and device for switching a display channel, a display driving device and a display device. The method includes: sending a first switching signal to a write controller of a current display channel when a switching instruction for switching from the current display channel to a target display channel is received; acquiring a frame address in which final write operation of data is completed, and taking the frame address as a first address and a next frame address as a second address; sending a second switching signal to a write controller of the target display channel; and sending a third switching signal to a read controller.

    Programmable logic device-based data processing apparatus and driving method therefor, and display apparatus
    6.
    发明授权
    Programmable logic device-based data processing apparatus and driving method therefor, and display apparatus 有权

    公开(公告)号：US11455973B2

    公开(公告)日：2022-09-27

    申请号：US17254397

    申请日：2020-04-27

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Xitong Ma

    IPC: G09G5/373 ,  G05F1/10 ,  G06T3/40 ,  H03K19/173

    Abstract: A data processing device based on a programmable logic device is described that includes at least one function circuit configured to process input data; and at least one current smoothing circuit, each corresponding to one of the at least one function circuit, and configured to smooth a current change of the programmable logic device caused when a corresponding function circuit is switched between on and off. The current smoothing circuit includes a control circuit configured to generate a driving signal based on a switching manner of the function circuit corresponding to the current smoothing circuit; and a redundant circuit configured to operate according to the driving signal to smooth the current change. The control circuit includes a decoding control word generating circuit and a decoding circuit.

    Data processing method, device and storage medium
    7.
    发明授权
    Data processing method, device and storage medium 有权

    公开(公告)号：US11379903B2

    公开(公告)日：2022-07-05

    申请号：US16243759

    申请日：2019-01-09

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Naifu Wu ,  Xitong Ma ,  Hongtao Guan

    IPC: G06Q30/00 ,  G06Q30/06 ,  G06Q20/12 ,  G06Q20/40

    Abstract: The present disclosure relates to a data processing method, device, and storage medium. The method includes obtaining information indicating that a plurality of users put one or more items into a container device. The information includes a device identification of the container device, user identifications of the plurality of users, item identifications of the one or more items, and action information indicating that the users put one or more items into the container device. The method includes determining a correspondence between the items and the users according to the information indicating that the plurality of users put one or more items into the container device.

    Data Transmission and Reception Method, Apparatus and Storage Medium
    10.
    发明申请
    Data Transmission and Reception Method, Apparatus and Storage Medium 审中-公开

    公开(公告)号：US20200313843A1

    公开(公告)日：2020-10-01

    申请号：US16555467

    申请日：2019-08-29

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Xitong Ma ,  Ran Duan ,  Lihua Geng ,  Yanfu Li

    IPC: H04L7/00 ,  H04L7/033

    Abstract: The present disclosure provides a data transmission method, includes: multiplying a frequency of a basic clock, so as to obtain a frequency-multiplied clock, in which a maximum number of high levels in the frequency-multiplied clock is greater than a maximum numerical value that the bit number can represent; removing an invalid bit width from the data to be transmitted, and determining a bit number of an effective bit width thereof and a numerical value represented by the effective bit width; determining a data period, according to the bit number of the effective bit width in the data to be transmitted; determining an actual number of high levels, according to a numerical value represented by the effective bit width in the data to be transmitted; and transmitting the data to be transmitted based on the frequency-multiplied clock, according to the data period and the actual number of the high levels.

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