利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

4 条记录 (耗时 0.03 秒)

    Four transistor SRAM process
    3.
    发明授权
    Four transistor SRAM process 失效
    四晶体管SRAM工艺

    公开(公告)号：US5665629A

    公开(公告)日：1997-09-09

    申请号：US514016

    申请日：1995-08-11

    申请人： Bomy Able Chen ,  Gorden Seth Starkey

    发明人： Bomy Able Chen ,  Gorden Seth Starkey

    IPC分类号： H01L27/11 ,  H01L21/8244

    CPC分类号： H01L27/1112

    摘要： A SRAM cell with cross-coupled transistors, a pair of transfer gate transistors and a pair of load resistors is manufactured by forming a plurality of field effect transistors in a silicon substrate. In one embodiment, the transistors are formed in an SOI substrate to improve soft-error resistance. An insulator layer is deposited over the source, drain and gate contacts (device contact areas), hole openings are etched into the insulating layer to expose a plurality of device contact areas. A highly resistive layer is patterned to substantially cover and in contact with some selected contact hole openings and device contact areas. A conductive material is deposited into all of the contact hole openings so as to substantially over-fill the contact hole openings and make electrical contact with the device contacts and patterned resistive layer. A planarizing process used to remove the conductive material and the resistive layer outside of the contact holes, thus forming all contact studs with selected studs having integrated resistors. The contact studs are interconnected among themselves and connected to a power bus, a ground, word and bit lines to form the SRAM cell.

    摘要翻译： 通过在硅衬底中形成多个场效应晶体管来制造具有交叉耦合晶体管的SRAM单元，一对传输栅晶体管和一对负载电阻器。 在一个实施例中，晶体管形成在SOI衬底中以改善软错误电阻。 在源极，漏极和栅极触点（器件接触区域）上沉积绝缘体层，孔绝缘层中蚀刻出孔开口以露出多个器件接触区域。 图案化高电阻层以基本上覆盖并接触一些所选择的接触孔开口和设备接触区域。 导电材料沉积到所有接触孔开口中，以便基本上填充接触孔开口并与器件触点和图案化电阻层电接触。 用于去除接触孔外部的导电材料和电阻层的平面化处理，从而形成具有集成电阻器的所选螺柱的所有触头螺柱。 接触柱在它们之间互连并连接到电源总线，接地，字和位线以形成SRAM单元。