公开(公告)号：US20150303171A1

公开(公告)日：2015-10-22

申请号：US14690763

申请日：2015-04-20

Applicant: Cirrus Logic, Inc.

Inventor： David T. Patten ,  Jason Hwang ,  Joseph Martin Gabriel, III

IPC: H01L23/00 ,  H01L21/683

CPC classification number: H01L24/97 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/83 ,  H01L2221/68318 ,  H01L2224/83005

Abstract: In accordance with embodiments of the present disclosure, a method may include providing a substrate adapted for use in wafer processing equipment, wherein the substrate includes an adhesive applied thereto. The method may also include reconstituting a plurality of device packages onto the substrate. In accordance with these and other embodiments of the present disclosure, an apparatus may include a substrate adapted for use in wafer processing equipment, an adhesive applied to the substrate, and a plurality of device packages reconstituted onto the substrate.

Abstract translation: 根据本公开的实施例，方法可以包括提供适于在晶片加工设备中使用的基板，其中所述基板包括施加到其上的粘合剂。 该方法还可以包括将多个器件封装复原到衬底上。 根据本公开的这些和其他实施例，装置可以包括适用于晶片处理设备的基板，施加到基板的粘合剂以及重构到基板上的多个器件封装。

公开(公告)号：US20150338453A1

公开(公告)日：2015-11-26

申请号：US14720304

申请日：2015-05-22

Applicant: Cirrus Logic, Inc.

Inventor： Martin Joseph Gabriel, III ,  Jason Hwang

IPC: G01R31/26 ,  G01R1/073 ,  G01R31/02

CPC classification number: G01R31/26 ,  G01R1/073 ,  G01R31/02 ,  G01R31/2894

Abstract: Systems and methods for multi-site placement of singulated semiconductor devices are presented. The systems and methods for multi-site placement may facilitate multi-site testing of the singulated semiconductor devices. A method may include determining a quantity of singulated semiconductor devices to be arranged in a test configuration. The method may also include determining, using a data processing device, a test configuration in response to the quantity. In further embodiments, the method may include placing the singulated semiconductor devices in a test frame according to the test configuration.

Abstract translation: 提出了用于单位半导体器件的多位置放置的系统和方法。 用于多位置放置的系统和方法可以促进单个半导体器件的多位点测试。 一种方法可以包括确定要布置在测试配置中的单个半导体器件的数量。 该方法还可以包括响应于数量来确定使用数据处理设备的测试配置。 在另外的实施例中，该方法可以包括根据测试配置将分割的半导体器件放置在测试框架中。

公开(公告)号：US10126351B2

公开(公告)日：2018-11-13

申请号：US14720304

申请日：2015-05-22

Applicant: Cirrus Logic, Inc.

Inventor： Martin Joseph Gabriel, III ,  Jason Hwang

IPC: G01R31/26 ,  G01R31/02 ,  G01R1/073 ,  G01R31/28

Abstract: Systems and methods for multi-site placement of singulated semiconductor devices are presented. The systems and methods for multi-site placement may facilitate multi-site testing of the singulated semiconductor devices. A method may include determining a quantity of singulated semiconductor devices to be arranged in a test configuration. The method may also include determining, using a data processing device, a test configuration in response to the quantity. In further embodiments, the method may include placing the singulated semiconductor devices in a test frame according to the test configuration.