公开(公告)号：US20240154612A1

公开(公告)日：2024-05-09

申请号：US18483727

申请日：2023-10-10

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Kapil SHARMA ,  Andrew J. HOWLETT ,  Matthew PETHERBRIDGE ,  John B. BOWLERWELL ,  Graeme S. ANGUS ,  Gordon RUSSELL

IPC: H03K17/687

CPC classification number: H03K17/6871

Abstract: The application relates to voltage supply in switched-mode driver integrated circuit (IC). The IC has an output bridge with first and second circuit branches, where each of the circuit branches has an output node (102a, 102b) connected between first and second transistor switches (103a, 104a; 103b, 104b) for selectively connecting the output node to respective first and second voltages (VH, VL). There are discrete first and second IC die contacts (208a, 208b) for receiving the first voltage, and the first and second circuit branches are connected to the first and second IC die contacts respectively. Ancillary circuitry (105) is configured to receive a supply voltage from a voltage supply node voltage which is connected to the first and second IC die contacts via respective first and second respectively matched resistances.

公开(公告)号：US20210242865A1

公开(公告)日：2021-08-05

申请号：US17159786

申请日：2021-01-27

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Andrew BUIST ,  Mark MCCLOY-STEVENS ,  Dave SMITH ,  Gordon RUSSELL ,  Huy Binh LE

IPC: H03K17/0814 ,  H02H3/18

Abstract: Circuitry for controlling current between a load and a power supply, the circuitry comprising: an output stage comprising: an input node configured to be coupled to the power supply; and an output node configured to be coupled to the load; and one or more control nodes for controlling a conduction path between the input node and the output node; and protection circuitry coupled to the one or more control nodes, the protection circuitry configured to break the conduction path between the input node and the output node when a load voltage at the output node exceeds a supply voltage at the input node, wherein the protection circuitry comprises: an active protection circuit configured to break the conduction path when the supply voltage exceeds an operational threshold of the active protection circuit; and a passive protection circuit configured to break the conduction path when the supply voltage is below an operation threshold of the active protection circuit.

公开(公告)号：US20170346242A1

公开(公告)日：2017-11-30

申请号：US15591764

申请日：2017-05-10

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Andrew James HOWLETT ,  Gordon RUSSELL

IPC: H01R13/66 ,  G06F1/32

Abstract: This application relates to monitoring of electronic devices (100) and in particular to methods and apparatus for the detection and recording of an electrical overstress applied to a connector (101, 102) of the device. The apparatus describes an integrated circuit integrated circuit (103, 105, 106a) of the host device having a first set of one or more circuit contacts (201, 203, 204, 205) for connection to a connector (101) of a host electronic device. The circuit has an electrical overstress monitor (106, 106a) for detecting and recording an electrical overstress comprising a voltage exceeding a predetermined parameter applied to at least one of said first set of circuit contacts. The electrical overstress monitor (106) may have an overvoltage detector (205) and may have a memory (206) for recording the occurrence of an overvoltage and/or a communication module (207) for communicating with other components of the host device in the event of an electrical overstress.