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    OPTICAL WAFER-LEVEL PACKAGE
    1.
    发明公开
    OPTICAL WAFER-LEVEL PACKAGE 审中-公开

    公开(公告)号：US20240184066A1

    公开(公告)日：2024-06-06

    申请号：US18061881

    申请日：2022-12-05

    Applicant: Cisco Technology, Inc.

    Inventor： Norbert SCHLEPPLE ,  Aparna R. PRASAD ,  Vipulkumar K. PATEL

    IPC: G02B6/42 ,  H04B10/40

    CPC classification number: G02B6/4239 ,  G02B6/4238 ,  G02B6/4245 ,  G02B6/4255 ,  G02B6/4257 ,  G02B6/426 ,  G02B6/428 ,  H04B10/40

    Abstract: In a first embodiment aspect presented in this disclosure, an optical wafer-level (OWL) package includes a frontside electrical redistribution layer (RDL) and a molding compound layer, the OWL package further including at least one of (1) an optical transmitter at least partially embedded within the molding compound layer and electrically coupled to the frontside electrical RDL, the optical transmitter arranged for providing an optically modulated output data signal; or (2) an optical receiver at least partially embedded within the molding compound layer and electrically coupled to the frontside electrical RDL, the optical receiver arranged for receiving an optically modulated input data signal.

    PACKAGING WITH SUBSTRATE AND PRINTED CIRCUIT BOARD CUTOUTS
    2.
    发明申请
    PACKAGING WITH SUBSTRATE AND PRINTED CIRCUIT BOARD CUTOUTS 有权

    公开(公告)号：US20220113480A1

    公开(公告)日：2022-04-14

    申请号：US17070763

    申请日：2020-10-14

    Applicant: Cisco Technology, Inc.

    Inventor： Ashley J.M. ERICKSON ,  Vipulkumar K. PATEL ,  Aparna R. PRASAD

    IPC: G02B6/42 ,  G02B6/13 ,  G02B6/12

    Abstract: An integrated circuit (IC) package having multiple ICs is provided. The IC package includes a printed circuit board (PCB) having a cutout region and a substrate disposed above the PCB. The substrate includes a first cavity on a first surface of the substrate. The IC package also includes a first IC disposed on a second surface of the substrate and in the cutout region of the PCB, The IC package further includes a second IC disposed above the substrate, and a first device disposed on the second IC and in the first cavity on the first surface of the substrate.

    INTEGRATED DECOUPLING CAPACITORS
    3.
    发明申请
    INTEGRATED DECOUPLING CAPACITORS 有权

    公开(公告)号：US20220077084A1

    公开(公告)日：2022-03-10

    申请号：US17454937

    申请日：2021-11-15

    Applicant: Cisco Technology, Inc.

    Inventor： Vipulkumar K. PATEL ,  Mark A. WEBSTER ,  Craig S. APPEL

    IPC: H01L23/00 ,  H01L23/522 ,  H01L21/20

    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.

    OPTICAL SYSTEM WITH OFFLOADED OPTICAL COMPONENTS
    6.
    发明申请
    OPTICAL SYSTEM WITH OFFLOADED OPTICAL COMPONENTS 有权

    公开(公告)号：US20250030497A1

    公开(公告)日：2025-01-23

    申请号：US18353781

    申请日：2023-07-17

    Applicant: Cisco Technology, Inc.

    Inventor： Vipulkumar K. PATEL ,  Romesh Kumar NANDWANA ,  Norbert SCHLEPPLE ,  Eng Wen ONG ,  Prakash B. GOTHOSKAR

    IPC: H04J14/06 ,  H04B10/67

    Abstract: The present disclosure describes an optical system and method of operating the optical system. The optical system includes a substrate and first and second photonic integrated circuits. The first photonic integrated circuit is positioned on the substrate. The second photonic integrated circuit is positioned on the first photonic integrated circuit. The second photonic integrated circuit receives a first optical signal that includes a first mode and a second mode. The second photonic integrated circuit includes a polarization splitter rotator, a first demultiplexer, and a second demultiplexer. The polarization splitter rotator separates the first optical signal into a second optical with the first mode and a third optical signal with the first mode. The first and second demultiplexers separate the second and third optical signals into first and second pluralities of optical signals. The first and second pluralities of optical signals couple into the first photonic integrated circuit.

    DOUBLE BONDING WHEN FRABRICATING AN OPTICAL DEVICE
    8.
    发明申请
    DOUBLE BONDING WHEN FRABRICATING AN OPTICAL DEVICE 有权

    公开(公告)号：US20230015671A1

    公开(公告)日：2023-01-19

    申请号：US17305986

    申请日：2021-07-19

    Applicant: Cisco Technology, Inc.

    Inventor： Vipulkumar K. PATEL ,  Ravi S. TUMMIDI ,  Mark A. WEBSTER

    IPC: G02B6/43 ,  G02B6/42

    Abstract: Embodiments herein describe using a double wafer bonding process to form a photonic device. In one embodiment, during the bonding process, an optical element (e.g., a high precision optical element) is optically coupled to an optical device in an active surface layer. In one example, the optical element comprises a nitride layer which can be patterned to form a nitride waveguide, passive optical multiplexer or demultiplexer, or an optical coupler.

    SILICON PHOTONICS PLATFORM WITH INTEGRATED OXIDE TRENCH EDGE COUPLER STRUCTURE
    9.
    发明申请
    SILICON PHOTONICS PLATFORM WITH INTEGRATED OXIDE TRENCH EDGE COUPLER STRUCTURE 有权

    公开(公告)号：US20210311255A1

    公开(公告)日：2021-10-07

    申请号：US17304227

    申请日：2021-06-16

    Applicant: Cisco Technology, Inc.

    Inventor： Alexey V. VERT ,  Vipulkumar K. PATEL ,  Mark A. WEBSTER

    IPC: G02B6/122 ,  G02B6/136 ,  G02B6/12 ,  G02B6/30 ,  G02B6/293

    Abstract: A method includes defining a first waveguide in a first region of an optical device over a first dielectric layer over a silicon on insulator (SOI) substrate of the optical device and disposing a second dielectric layer on the first waveguide and the first dielectric layer of the optical device. The method also includes defining a second region on the second dielectric layer, the first dielectric layer, and the SOI substrate. The second region includes an integrated trench structure defined in the SOI substrate. The method further includes etching the second region to form an etched second region, disposing a third dielectric layer in the etched second region, and disposing a second waveguide on at least the third dielectric layer. The second waveguide is disposed to provide an optical coupling between the second waveguide and the first waveguide.

    III-V LASER PLATFORMS ON SILICON WITH THROUGH SILICON VIAS BY WAFER SCALE BONDING
    10.
    发明申请
    III-V LASER PLATFORMS ON SILICON WITH THROUGH SILICON VIAS BY WAFER SCALE BONDING 审中-公开

    公开(公告)号：US20200212649A1

    公开(公告)日：2020-07-02

    申请号：US16234105

    申请日：2018-12-27

    Applicant: Cisco Technology, Inc.

    Inventor： Jock T. BOVINGTON ,  Vipulkumar K. PATEL ,  Dominic F. SIRIANI

    IPC: H01S5/02 ,  H01S5/042 ,  H01S5/343 ,  H01S5/34 ,  H01S5/40

    Abstract: A laser integrated photonic platform to allow for independent fabrication and development of laser systems in silicon photonics. The photonic platform includes a silicon substrate with an upper surface, one or more through silicon vias (TSVs) defined through the silicon substrate, and passive alignment features in the substrate. The photonic platform includes a silicon substrate wafer with through silicon vias (TSVs) defined through the silicon substrate, and passive alignment features in the substrate for mating the photonic platform to a photonics integrated circuit. The photonic platform also includes a III-V semiconductor material structure wafer, where the III-V wafer is bonded to the upper surface of the silicon substrate and includes at least one active layer forming a light source for the photonic platform.

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