公开(公告)号：US20080157875A1

公开(公告)日：2008-07-03

申请号：US11618152

申请日：2006-12-29

申请人： Arya Behzad ,  Stephen Chi-Wang Au ,  Dandan Li

发明人： Arya Behzad ,  Stephen Chi-Wang Au ,  Dandan Li

IPC分类号： H03F3/04 ,  G05F3/02

CPC分类号： H03F3/04 ,  H03F1/301 ,  H03F3/345 ,  H03F3/45183 ,  H03F2200/462 ,  H03F2200/78 ,  H03F2203/45244 ,  H03F2203/45476

摘要： Aspects of a method and system for precise current matching in deep sub-micron technology may include adjusting a current mirror to compensate for MOSFET gate leakage currents by using feedback circuits. The feedback circuits may be implemented from active components to create active feedback circuits. If the reference current to be mirrored is noisy, a smoothing effect may be achieved by introducing a low-pass filter coupled to the current mirror design. The active feedback may comprise amplifiers, which may comprise one or more amplifier stages. The amplifier may amplify either a bias voltage error or a bias current error. Furthermore, a transimpedance amplifier may be utilized in the feedback loop. The output bias current of the current mirror may be stabilized dynamically during adjusting. Multiple current sources may be utilized in the current mirrors.

摘要翻译： 深亚微米技术中精确电流匹配的方法和系统的方面可能包括调整电流镜以通过使用反馈电路来补偿MOSFET栅极漏电流。 反馈电路可以由有源部件实现以产生有源反馈电路。 如果要镜像的参考电流是嘈杂的，则可以通过引入耦合到当前镜子设计的低通滤波器来实现平滑效果。 有源反馈可以包括放大器，其可以包括一个或多个放大器级。 放大器可能放大偏置电压误差或偏置电流误差。 此外，可以在反馈回路中使用跨阻放大器。 电流镜的输出偏置电流在调节期间可以动态稳定。 电流镜可以使用多个电流源。

公开(公告)号：US20080139150A1

公开(公告)日：2008-06-12

申请号：US11618716

申请日：2006-12-29

申请人： Qiang Li ,  Razieh Roufoogaran ,  Arya Behzad ,  Dandan Li ,  Hung-Ming Chien

发明人： Qiang Li ,  Razieh Roufoogaran ,  Arya Behzad ,  Dandan Li ,  Hung-Ming Chien

IPC分类号： H04B1/16

CPC分类号： H04B1/406 ,  H03L7/18 ,  Y02D70/122 ,  Y02D70/124

摘要： Certain aspects of a method and system for mitigating effects of pulling in multiple phase locked loops in multi-standard systems may include selecting an input frequency range of operation at a voltage controlled oscillator based on a particular wireless band of operation in a system that handles a first wireless communication protocol and a second wireless communication protocol. An image rejection mixer may be enabled to generate an output signal for the particular wireless band of operation based on mixing a plurality of received signals within a selected frequency range. An in-phase (I) component and a quadrature (Q) component of the generated output signal may be generated by utilizing a RC-CR quadrature network.

摘要翻译： 用于减轻在多标准系统中拉动多个锁相环的影响的方法和系统的某些方面可包括基于处理一个或多个系统的系统中的特定无线工作频带来选择在压控振荡器处的输入频率范围 第一无线通信协议和第二无线通信协议。 可以使镜像抑制混频器能够基于在所选频率范围内混合多个接收信号来产生用于特定无线操作频带的输出信号。 可以通过利用RC-CR正交网络来产生所产生的输出信号的同相（I）分量和正交（Q）分量。

公开(公告)号：US07869781B2

公开(公告)日：2011-01-11

申请号：US11618716

申请日：2006-12-29

申请人： Qiang Li ,  Razieh Roufoogaran ,  Arya Behzad ,  Dandan Li ,  Hung-Ming Chien

发明人： Qiang Li ,  Razieh Roufoogaran ,  Arya Behzad ,  Dandan Li ,  Hung-Ming Chien

IPC分类号： H04B1/06

CPC分类号： H04B1/406 ,  H03L7/18 ,  Y02D70/122 ,  Y02D70/124

摘要： Certain aspects of a method and system for mitigating effects of pulling in multiple phase locked loops in multi-standard systems may include selecting an input frequency range of operation at a voltage controlled oscillator based on a particular wireless band of operation in a system that handles a first wireless communication protocol and a second wireless communication protocol. An image rejection mixer may be enabled to generate an output signal for the particular wireless band of operation based on mixing a plurality of received signals within a selected frequency range. An in-phase (I) component and a quadrature (Q) component of the generated output signal may be generated by utilizing a RC-CR quadrature network.

摘要翻译： 用于减轻在多标准系统中拉动多个锁相环的影响的方法和系统的某些方面可包括基于处理一个或多个系统的系统中的特定无线工作频带来选择在压控振荡器处的输入频率范围 第一无线通信协议和第二无线通信协议。 可以使镜像抑制混频器能够基于在所选频率范围内混合多个接收信号来产生用于特定无线操作频带的输出信号。 可以通过利用RC-CR正交网络来产生所产生的输出信号的同相（I）分量和正交（Q）分量。

公开(公告)号：US20080136468A1

公开(公告)日：2008-06-12

申请号：US11618655

申请日：2006-12-29

申请人： Dandan Li ,  Arya Behzad

发明人： Dandan Li ,  Arya Behzad

IPC分类号： H03B19/00

CPC分类号： H03D13/004 ,  H03L7/093 ,  H03L7/1976

摘要： Aspects of a method and system for signal processing are disclosed and may include using a frequency doubler to double the frequency of a reference signal utilized by a phase-frequency detector (PFD) in a fractional-N phase-locked-loop (PLL) synthesizer. Detecting and correcting a digital reference signal connected to the input of the frequency doubler. The digital reference signal may be generated by amplifying the difference between a low slew-rate reference signal and a reference voltage through a comparator. The reference voltage signal may be generated based on the detected duty-cycle of the digital reference signal. The duty-cycle of the digital reference signal may be adjusted by varying the generated reference voltage signal. The reference voltage may be generated by using difference of DC level of the digital reference signal and half rail. The reference voltage signal may be generated using a voltage digital-to-analog converter (DAC).

摘要翻译： 公开了用于信号处理的方法和系统的方面，并且可以包括使用倍频器将分频N锁相环（PLL）合成器中的相位 - 频率检测器（PFD）所使用的参考信号的频率加倍 。 检测和校正连接到倍频器输入端的数字参考信号。 数字参考信号可以通过比较器放大低压摆率参考信号和参考电压之间的差来产生。 可以基于检测到的数字参考信号的占空比来产生参考电压信号。 可以通过改变所产生的参考电压信号来调整数字参考信号的占空比。 可以通过使用数字参考信号和半导轨的直流电平的差异来产生参考电压。 参考电压信号可以使用电压数模转换器（DAC）产生。

公开(公告)号：US08093952B2

公开(公告)日：2012-01-10

申请号：US11618152

申请日：2006-12-29

申请人： Arya Behzad ,  Stephen Chi-Wang Au ,  Dandan Li

发明人： Arya Behzad ,  Stephen Chi-Wang Au ,  Dandan Li

IPC分类号： H03F3/04 ,  H00G3/10

CPC分类号： H03F3/04 ,  H03F1/301 ,  H03F3/345 ,  H03F3/45183 ,  H03F2200/462 ,  H03F2200/78 ,  H03F2203/45244 ,  H03F2203/45476

摘要： Aspects of a method and system for precise current matching in deep sub-micron technology may include adjusting a current mirror to compensate for MOSFET gate leakage currents by using feedback circuits. The feedback circuits may be implemented from active components to create active feedback circuits. If the reference current to be mirrored is noisy, a smoothing effect may be achieved by introducing a low-pass filter coupled to the current mirror design. The active feedback may comprise amplifiers, which may comprise one or more amplifier stages. The amplifier may amplify either a bias voltage error or a bias current error. Furthermore, a transimpedance amplifier may be utilized in the feedback loop. The output bias current of the current mirror may be stabilized dynamically during adjusting. Multiple current sources may be utilized in the current mirrors.

摘要翻译： 深亚微米技术中精确电流匹配的方法和系统的方面可能包括调整电流镜以通过使用反馈电路来补偿MOSFET栅极漏电流。 反馈电路可以由有源部件实现以产生有源反馈电路。 如果要镜像的参考电流是嘈杂的，则可以通过引入耦合到当前镜子设计的低通滤波器来实现平滑效果。 有源反馈可以包括放大器，其可以包括一个或多个放大器级。 放大器可能放大偏置电压误差或偏置电流误差。 此外，可以在反馈回路中使用跨阻放大器。 电流镜的输出偏置电流在调节期间可以动态稳定。 电流镜可以使用多个电流源。

公开(公告)号：US20110103526A1

公开(公告)日：2011-05-05

申请号：US13004675

申请日：2011-01-11

申请人： Qiang Li ,  Razieh Roufoogaran ,  Arya Behzad ,  Dandan Li ,  Hung-Ming Chien

发明人： Qiang Li ,  Razieh Roufoogaran ,  Arya Behzad ,  Dandan Li ,  Hung-Ming Chien

IPC分类号： H04L27/06

CPC分类号： H04B1/406 ,  H03L7/18 ,  Y02D70/122 ,  Y02D70/124

摘要： Certain aspects of a method and system for mitigating effects of pulling in multiple phase locked loops in multi-standard systems may include selecting an input frequency range of operation at a voltage controlled oscillator based on a particular wireless band of operation in a system that handles a first wireless communication protocol and a second wireless communication protocol. An image rejection mixer may be enabled to generate an output signal for the particular wireless band of operation based on mixing a plurality of received signals within a selected frequency range. An in-phase (I) component and a quadrature (Q) component of the generated output signal may be generated by utilizing a RC-CR quadrature network.

摘要翻译： 用于减轻在多标准系统中拉动多个锁相环的影响的方法和系统的某些方面可包括基于处理一个或多个系统的系统中的特定无线工作频带来选择在压控振荡器处的输入频率范围 第一无线通信协议和第二无线通信协议。 可以使镜像抑制混频器能够基于在所选频率范围内混合多个接收信号来产生用于特定无线操作频带的输出信号。 可以通过利用RC-CR正交网络来产生所产生的输出信号的同相（I）分量和正交（Q）分量。

公开(公告)号：US08676139B2

公开(公告)日：2014-03-18

申请号：US13004675

申请日：2011-01-11

申请人： Qiang Li ,  Razieh Roufoogaran ,  Arya Behzad ,  Dandan Li ,  Hung-Ming Chien

发明人： Qiang Li ,  Razieh Roufoogaran ,  Arya Behzad ,  Dandan Li ,  Hung-Ming Chien

IPC分类号： H04B7/00

CPC分类号： H04B1/406 ,  H03L7/18 ,  Y02D70/122 ,  Y02D70/124

摘要： Certain aspects of a method and system for mitigating effects of pulling in multiple phase locked loops in multi-standard systems may include selecting an input frequency range of operation at a voltage controlled oscillator based on a particular wireless band of operation in a system that handles a first wireless communication protocol and a second wireless communication protocol. An image rejection mixer may be enabled to generate an output signal for the particular wireless band of operation based on mixing a plurality of received signals within a selected frequency range. An in-phase (I) component and a quadrature (Q) component of the generated output signal may be generated by utilizing a RC-CR quadrature network.

摘要翻译： 用于减轻在多标准系统中拉动多个锁相环的影响的方法和系统的某些方面可包括基于处理一个或多个系统的系统中的特定无线工作频带来选择在压控振荡器处的输入频率范围 第一无线通信协议和第二无线通信协议。 可以使镜像抑制混频器能够基于在所选频率范围内混合多个接收信号来产生用于特定无线操作频带的输出信号。 可以通过利用RC-CR正交网络来产生所产生的输出信号的同相（I）分量和正交（Q）分量。

公开(公告)号：USD1037353S1

公开(公告)日：2024-07-30

申请号：US29864772

申请日：2022-06-17

申请人： Dandan Li

设计人： Dandan Li

摘要： FIG. 1 is a perspective view of a drawing board set showing my new design;
FIG. 2 is another perspective view thereof;
FIG. 3 is a front elevational view thereof;
FIG. 4 is a rear elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a top plan view thereof;
FIG. 8 is a bottom plan view thereof;
FIG. 9 is a perspective view of the drawing board set where the drawing board set is in a first configuration of use;
FIG. 10 is a perspective view of the drawing board set where the drawing board set is in a second configuration of use;
FIG. 11 is a perspective view of the drawing board set where the drawings board set is in a storage state; and,
FIG. 12 is an enlarged view of portion 12 shown in FIG. 1.
The dash-dash broken lines in FIGS. 1-6 illustrates portions of the drawing board set that form no part of the claimed design. The dash-dash broken lines in FIGS. 9 and 11 illustrating drawing boards depict environment that form no part of the claimed design. The dot-dash broken lines represent boundaries of the enlarged portion and form no part of the claimed design.

公开(公告)号：US20130107925A1

公开(公告)日：2013-05-02

申请号：US13329299

申请日：2011-12-18

申请人： Stephen Au ,  Dandan Li ,  Arya Reza Behzad

发明人： Stephen Au ,  Dandan Li ,  Arya Reza Behzad

IPC分类号： H04B17/00

CPC分类号： H04B1/30 ,  H03D3/008 ,  H03D7/1458 ,  H03D7/165

摘要： A down conversion module includes a mixer operable to down convert an amplified receive signal from a low noise amplifier, based on a local oscillation, to produce a mixer output signal. A mixer load section is operable to produce a down converted signal from mixer output at an output of the mixer load section. A direct current (DC) offset cancellation module is operable to measure a DC offset at the output of the mixer load section, to generate cancellation currents and to combine the cancellation currents with the mixer output signal to provide DC offset cancellation.

摘要翻译： 降频转换模块包括可操作以基于本地振荡将来自低噪声放大器的放大的接收信号下变频以产生混频器输出信号的混频器。 混频器负载部分可操作以在混频器负载部分的输出处产生来自混频器输出的下变频信号。 直流（DC）偏移消除模块可操作以测量混频器负载部分的输出处的DC偏移，以产生消除电流并将消除电流与混频器输出信号组合以提供DC偏移消除。

公开(公告)号：US07616069B2

公开(公告)日：2009-11-10

申请号：US11618715

申请日：2006-12-29

申请人： Dandan Li

发明人： Dandan Li

IPC分类号： H03L7/085

CPC分类号： H03L7/0891 ,  H03L7/093 ,  H03L7/1976

摘要： Aspects of a method and system for a fast phase-locked loop (PLL) close-loop settling after an open-loop voltage controlled oscillator (VCO) calibration are provided. A fractional-N PLL synthesizer may comprise a VCO, a phase-frequency detector (PFD), a D flip-flop, a divider, a charge pump, and a loop filter. The synthesizer may disable the PFD based on a control signal indicating the start of VCO open-loop calibration. After open-loop calibration, the synthesizer may subsequently enable a PLL closed-loop settling and may enable the PFD to control the charge pump when the input reference signal phase lags a phase of a divider signal generated by the divider. The D flip-flop may enable and disable the PFD. During open-loop calibration, the loop filter may be discharged via a leakage current in the charge pump. During closed-loop settling, the loop filter may be charged by the charge pump via control of the PFD.

摘要翻译： 提供了开环压控振荡器（VCO）校准后快速锁相环（PLL）闭环稳定方法和系统的方面。 分数N PLL合成器可以包括VCO，相位频率检测器（PFD），D触发器，分频器，电荷泵和环路滤波器。 合成器可以基于指示VCO开环校准开始的控制信号来禁用PFD。 在开环校准之后，合成器可以随后启用PLL闭环稳定，并且当输入参考信号相位滞后于由分频器产生的分频器信号的相位时，PFD可以使PFD控制电荷泵。 D触发器可以启用和禁用PFD。 在开环校准期间，环路滤波器可能通过电荷泵中的漏电流放电。 在闭环稳定期间，环路滤波器可以通过PFD的控制由电荷泵充电。