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    Method and System for Implementing a PLL using High-Voltage Switches and Regulators
    2.
    发明申请
    Method and System for Implementing a PLL using High-Voltage Switches and Regulators 有权
    使用高压开关和稳压器实现PLL的方法和系统

    公开(公告)号：US20090067478A1

    公开(公告)日：2009-03-12

    申请号：US11867310

    申请日：2007-10-04

    申请人： Stephen Au ,  Dandan Li

    发明人： Stephen Au ,  Dandan Li

    IPC分类号： H04B1/38

    CPC分类号： H04B1/40 ,  H03L7/0895 ,  H03L7/093 ,  H04B1/0475

    摘要： A method and apparatus in an integrated circuit radio transceiver are operable to apply a modified control signal to drive logic that includes a plurality of first devices having a first threshold voltage and a first gate oxide thickness that are both greater than a second threshold voltage and a second gate oxide thickness for a greater second plurality of devices within the integrated circuit radio transceiver. The transceiver therefore generates a first control signal having a first magnitude operable to drive logic that includes a plurality of devices having a second threshold voltage and applies the first control signal to a level shifter to produce the modified control signal.

    摘要翻译： 集成电路无线电收发器中的方法和装置可操作以将经修改的控制信号施加到驱动逻辑，该驱动逻辑包括具有大于第二阈值电压的第一阈值电压和第一栅极氧化物厚度的多个第一器件， 第二栅极氧化物厚度用于集成电路无线电收发器内的更大的第二多个器件。 因此，收发器产生具有第一量值的第一控制信号，其可操作以驱动包括具有第二阈值电压的多个器件的逻辑，并将第一控制信号施加到电平移位器以产生修改的控制信号。

    NAND flash memory management
    3.
    发明申请
    NAND flash memory management 有权
    NAND闪存管理

    公开(公告)号：US20060239075A1

    公开(公告)日：2006-10-26

    申请号：US11115004

    申请日：2005-04-26

    申请人： Gregory Williams ,  Harjit Singh ,  Michael Love ,  Stephen Au

    发明人： Gregory Williams ,  Harjit Singh ,  Michael Love ,  Stephen Au

    IPC分类号： G11C16/04

    CPC分类号： G11C16/10 ,  G06F12/0246 ,  G11C29/76 ,  G11C2216/14

    摘要： A memory controller is utilized to overcome NAND flash memory's propensity for comprising bad blocks of memory. The memory controller utilizes minimal hardware and is essentially transparent to a device requesting access to the NAND memory. A NAND flash memory device is configured to comprise a set of main blocks of memory and a set of auxiliary blocks of memory. Each block is divided into pages of memory and each page includes metadata. The metadata includes a block status indicator, indicating whether a block is good or bad. When receiving a request to access a page in the NAND flash memory, if the block in which the page resides is good, that block is accessed. If the block is bad, auxiliary memory is searched until a block containing the address of the bad block in its metadata is found. The found block is accessed in lieu of the bad block.

    摘要翻译： 利用存储器控制器来克服NAND闪速存储器包含坏块存储器的倾向。 存储器控制器利用最小的硬件，并且对于请求访问NAND存储器的设备基本上是透明的。 NAND闪存设备被配置为包括一组主存储器块和一组辅助存储器块。 每个块分为内存页面，每个页面都包含元数据。 元数据包括块状态指示符，指示块是好还是坏。 当接收到访问NAND闪存中的页面的请求时，如果页面驻留的块好，则访问该块。 如果块是坏的，则搜索辅助存储器，直到找到包含其元数据中坏块地址的块。 找到的块被访问以代替坏块。

    Digital signature generation for hardware functional test
    5.
    发明申请
    Digital signature generation for hardware functional test 有权
    数字签名生成用于硬件功能测试

    公开(公告)号：US20060020860A1

    公开(公告)日：2006-01-26

    申请号：US10897058

    申请日：2004-07-22

    申请人： John Tardif ,  Stephen Au ,  Eiko Junus

    发明人： John Tardif ,  Stephen Au ,  Eiko Junus

    IPC分类号： G01R31/28

    CPC分类号： G01R31/318547 ,  G01R31/318566

    摘要： A Multiple Input Shift Register (MISR) is used to generate signatures, based on data from a device under test, in order to validate the proper sequence and content of the data over a defined period of time. The MISR described herein includes the ability to “tag” the signatures for each time period using an incrementing value, and make that tag and the signature readable by a test controller. The MISR has the flexibility to be reset to a known initial state (or otherwise load a seed value) at the beginning of each time period or to continue accumulating signatures without being reset (or using the seed value). Accumulation of signatures over an extended period of time allows a test controller to validate that no errors occurred during a long term test without having to closely monitor the intermediate results.

    摘要翻译： 多输入移位寄存器（MISR）用于根据来自被测器件的数据生成签名，以便在定义的时间段内验证数据的正确顺序和内容。 本文描述的MISR包括使用增量值对每个时间段的签名进行“标记”的能力，并使该标签和签名可由测试控制器读取。 MISR具有在每个时间段开始时被复位到已知初始状态（或以其他方式加载种子值）的灵活性，或者在不重置（或使用种子值）的情况下继续累积签名）。 在长时间内累积签名允许测试控制员验证在长期测试期间没有发生错误，而不必密切监视中间结果。

    DOWN CONVERTER WITH OFFSET CANCELLATION AND METHODS FOR USE THEREWITH
    6.
    发明申请
    DOWN CONVERTER WITH OFFSET CANCELLATION AND METHODS FOR USE THEREWITH 审中-公开
    下变频器与偏移取消及其使用方法

    公开(公告)号：US20130107925A1

    公开(公告)日：2013-05-02

    申请号：US13329299

    申请日：2011-12-18

    申请人： Stephen Au ,  Dandan Li ,  Arya Reza Behzad

    发明人： Stephen Au ,  Dandan Li ,  Arya Reza Behzad

    IPC分类号： H04B17/00

    CPC分类号： H04B1/30 ,  H03D3/008 ,  H03D7/1458 ,  H03D7/165

    摘要： A down conversion module includes a mixer operable to down convert an amplified receive signal from a low noise amplifier, based on a local oscillation, to produce a mixer output signal. A mixer load section is operable to produce a down converted signal from mixer output at an output of the mixer load section. A direct current (DC) offset cancellation module is operable to measure a DC offset at the output of the mixer load section, to generate cancellation currents and to combine the cancellation currents with the mixer output signal to provide DC offset cancellation.

    摘要翻译： 降频转换模块包括可操作以基于本地振荡将来自低噪声放大器的放大的接收信号下变频以产生混频器输出信号的混频器。 混频器负载部分可操作以在混频器负载部分的输出处产生来自混频器输出的下变频信号。 直流（DC）偏移消除模块可操作以测量混频器负载部分的输出处的DC偏移，以产生消除电流并将消除电流与混频器输出信号组合以提供DC偏移消除。

    System and method for optimal biasing of a telescopic cascode operational transconductance amplifier (OTA)
    7.
    发明授权
    System and method for optimal biasing of a telescopic cascode operational transconductance amplifier (OTA) 有权
    可伸缩共源共栅运算跨导放大器（OTA）的最佳偏置的系统和方法

    公开(公告)号：US06362688B1

    公开(公告)日：2002-03-26

    申请号：US09559246

    申请日：2000-04-26

    申请人： Stephen Au

    发明人： Stephen Au

    IPC分类号： H03F345

    CPC分类号： H03F3/45188 ,  H03F3/005 ,  H03F3/45659 ,  H03F2203/45356 ,  H03F2203/45398 ,  H03F2203/45651 ,  H03F2203/45682 ,  H03F2203/45732

    摘要： A system and method of biasing a telescopic cascode operational transconductance amplifier is provided to prevent or reduce the likelihood that the inputs to the amplifier do exceed the input common mode voltage range for the amplifier. The system and method provides a bias control circuit for the differential input transistors and tail current transistor of the operational amplifier such that their respective Vds−Vdsat is maintained substantially constant. To accomplish this, the biasing system and method uses a bandgap voltage source that typically produces a highly stable voltage that is substantially temperature and process invariant. The bandgap voltage source is used to generate bias voltages applied to the gates and drains of the differential input transistors that maintains their and the tail current transistor's Vds−Vdsat substantially constant. There are several advantages of the system and method for biasing a telescopic cascode OTA. First, by keeping Vds−Vdsat substantially constant for the tail current transistor, this transistor is prevented from operating in its linear region, which would otherwise cause a decrease in the bandwidth of the amplifier. Second, by keeping (i.e. Vds−Vdsat) is substantially constant for the input transistors, these transistors are prevented from operating in their linear region, which would otherwise cause a reduction in the output impedance and the DC gain of the amplifier. Third, Vds−Vdsat for the input and tail current transistors can be maintained relatively low in order to minimize the reduction of the output swing of the amplifier.

    摘要翻译： 提供了一种偏置伸缩共源共栅运算跨导放大器的系统和方法，以防止或减少放大器的输入超过放大器的输入共模电压范围的可能性。 该系统和方法为运算放大器的差分输入晶体管和尾电流晶体管提供偏置控制电路，使得它们各自的Vds-Vdsat保持基本恒定。 为了实现这一点，偏置系统和方法使用通常产生基本上温度和过程不变的高度稳定的电压的带隙电压源。 带隙电压源用于产生施加到差分输入晶体管的栅极和漏极的偏置电压，其保持它们和尾电流晶体管的Vds-Vdsat基本恒定。 用于偏置可伸缩共源共栅OTA的系统和方法有几个优点。 首先，通过使Vds-Vdsat对于尾电流晶体管保持基本恒定，该晶体管被阻止在其线性区域中工作，否则会导致放大器带宽的降低。 第二，通过保持（即Vds-Vdsat）对于输入晶体管基本上是恒定的，这些晶体管被阻止在它们的线性区域中工作，这将导致放大器的输出阻抗和DC增益的降低。 第三，为了最小化放大器的输出摆幅的减小，用于输入和电流晶体管的Vds-Vdsat可以保持相对较低。

    Programmable low noise amplifier and methods for use therewith
    8.
    发明授权
    Programmable low noise amplifier and methods for use therewith 有权
    可编程低噪声放大器及其使用方法

    公开(公告)号：US08400224B1

    公开(公告)日：2013-03-19

    申请号：US13329294

    申请日：2011-12-18

    申请人： Stephen Au ,  Long Bu ,  Dandan Li

    发明人： Stephen Au ,  Long Bu ,  Dandan Li

    IPC分类号： H03F1/22

    CPC分类号： H03F3/45089 ,  H03F3/191 ,  H03F3/45188

    摘要： A low noise amplifier includes a programmable input stage, having a first gain that is programmable based on a first control signal. A programmable cascode stage, has a second gain that is programmable based on a second control signal. A programmable resistor stage controls the quality of a resonant tank circuit, based on a third control signal.

    摘要翻译： 低噪声放大器包括可编程输入级，具有可基于第一控制信号编程的第一增益。 可编程共源共栅级具有基于第二控制信号可编程的第二增益。 可编程电阻级基于第三控制信号来控制谐振回路的质量。

    Method and system for implementing a PLL using high-voltage switches and regulators
    9.
    发明授权
    Method and system for implementing a PLL using high-voltage switches and regulators 有权
    使用高压开关和稳压器实现PLL的方法和系统

    公开(公告)号：US08009785B2

    公开(公告)日：2011-08-30

    申请号：US11867310

    申请日：2007-10-04

    申请人： Stephen Au ,  Dandan Li

    发明人： Stephen Au ,  Dandan Li

    IPC分类号： H04L7/00

    CPC分类号： H04B1/40 ,  H03L7/0895 ,  H03L7/093 ,  H04B1/0475

    摘要： A method and apparatus in an integrated circuit radio transceiver are operable to apply a modified control signal to drive logic that includes a plurality of first devices having a first threshold voltage and a first gate oxide thickness that are both greater than a second threshold voltage and a second gate oxide thickness for a greater second plurality of devices within the integrated circuit radio transceiver. The transceiver therefore generates a first control signal having a first magnitude operable to drive logic that includes a plurality of devices having a second threshold voltage and applies the first control signal to a level shifter to produce the modified control signal.

    摘要翻译： 集成电路无线电收发器中的方法和装置可操作以将经修改的控制信号施加到驱动逻辑，该驱动逻辑包括具有大于第二阈值电压的第一阈值电压和第一栅极氧化物厚度的多个第一器件， 第二栅极氧化物厚度用于集成电路无线电收发器内的更大的第二多个器件。 因此，收发器产生具有第一量值的第一控制信号，其可操作以驱动包括具有第二阈值电压的多个器件的逻辑，并将第一控制信号施加到电平移位器以产生修改的控制信号。