公开(公告)号：US20250023682A1

公开(公告)日：2025-01-16

申请号：US18712693

申请日：2022-11-23

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Gyeong Rae IM ,  Jung Bin KIM ,  Pan Soo KIM ,  Min Su SHIN ,  In Ki LEE ,  Dong Hyun JUNG ,  Soo Yeob JUNG ,  Seung Keun PARK ,  Joon Gyu RYU

IPC: H04L5/00 ,  H04B7/06 ,  H04W24/10

Abstract: The present invention relates to a method for transmitting a synchronization signal block (SSB) through a plurality of satellites from a base station that can connect to a plurality of gateways, wherein the method may comprise the steps of: controlling transmission of first SSBs corresponding to the number of beams of each satellite through respective transmission beams in a first SSB cycle; determining a transmission beam of each of the satellites on the basis of a first measurement report for the respective beams received from a terminal; and controlling transmission of second SSBs for determining one combination including two or more gateways among the plurality of gateways in a second SSB cycle.

公开(公告)号：US20230336243A1

公开(公告)日：2023-10-19

申请号：US18300214

申请日：2023-04-13

Applicant: Electronics and Telecommunications Research Institute

Inventor： In Ki LEE ,  Joon Gyu RYU

IPC: H04B7/185 ,  H04W56/00

CPC classification number: H04B7/18589 ,  H04W56/0015 ,  H04W84/06

Abstract: A method and an apparatus for network synchronization in a satellite communication system is provided. a satellite station receives a superframe start timing (SST) and an initial counter value from a center station, and receives traffic information sent from a terminal station at a time determined based on the SST. Then, the satellite station generates a compensation value for the SST upon receiving the traffic information, and corrects the SST in accordance with the compensation value.

公开(公告)号：US20250031162A1

公开(公告)日：2025-01-23

申请号：US18712650

申请日：2022-11-23

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Gyeong Rae IM ,  Jung Bin KIM ,  Pan Soo KIM ,  Min Su SHIN ,  In Ki LEE ,  Dong Hyun JUNG ,  Soo Yeob JUNG ,  Seung Keun PARK ,  Joon Gyu RYU

IPC: H04W56/00 ,  H04W16/28 ,  H04W72/0457 ,  H04W84/06

Abstract: A method according to an embodiment of the present invention corresponds to a method for transmitting, by a gateway, a synchronization signal block (SSB) through a plurality of satellites, and may comprise the steps of: determining satellite identification SSBs for identifying a plurality of satellites, respectively; determining beam identification SSBs for identifying beams usable for the plurality of satellites, respectively; and controlling the satellite identification SSBs and the beam identification SSBs to be transmitted to the plurality of satellites, respectively, through a predetermined resource, wherein the satellite identification SSBs and each of the beam identification SSBs have different SSB indices from each other.

公开(公告)号：US20150237407A1

公开(公告)日：2015-08-20

申请号：US14617087

申请日：2015-02-09

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： In Ki LEE ,  Min Hyuk KIM ,  Deock Gil OH ,  Ji Won JUNG

IPC: H04N21/643 ,  H04L25/03 ,  H04L1/00 ,  H04N21/61 ,  H04N21/44

CPC classification number: H04L25/03 ,  H04L1/005 ,  H04L1/0057 ,  H04L1/0071 ,  H04L25/03318

Abstract: Disclosed are a signal receiving apparatus based on FTN and a signal decoding method thereof, and the apparatus includes: an equalizer calculating, when a signal sampled by Fast to Nyquist (FTN) is received on a communication channel, a posterior probability of information bits and calculating a log likelihood ratio by using the calculated posterior probability; a deinterleaver deinterleaving bit data output from the equalizer; a decoder correcting of signal interference of the data bits deinterleaved by the deinterleaver by using the LLR and decoding the corrected signal interference; and an interleaver interleaving data output from the decoder to provide the interleaved data to the equalizer.

Abstract translation: 公开了一种基于FTN的信号接收装置及其信号解码方法，该装置包括：均衡器，当在通信信道上接收到通过快速到奈奎斯特（FTN）采样的信号时，计算信息比特的后验概率， 通过使用计算的后验概率计算对数似然比; 解交织器对来自均衡器的比特数据进行解交织; 通过使用LLR对由解交织器解交错的数据位的信号干扰进行校正的解码器，对解调后的信号干扰进行解码; 交织器交织从解码器输出的数据，以将间隔的数据提供给均衡器。

公开(公告)号：US20170264313A1

公开(公告)日：2017-09-14

申请号：US15452906

申请日：2017-03-08

Applicant: Electronics and Telecommunications Research Institute

Inventor： In Ki LEE ,  Min Hyuk KIM

IPC: H03M13/11 ,  H03M13/00

CPC classification number: H03M13/1105 ,  H03M13/1111 ,  H03M13/1131 ,  H03M13/1165 ,  H03M13/118 ,  H03M13/6522

Abstract: Provided is a decoder that is at least temporarily implemented by a processor of a computing device. The decoder includes a calculator configured to repeatedly perform a calculation of a bit node and a calculation of a check node for an input frame, a processor configured to determine whether to input the bit node to a next calculation of the check node based on a code of the bit node, and an outputter configured to output a decoded code based on the bit node determined to be input.

公开(公告)号：US20140089766A1

公开(公告)日：2014-03-27

申请号：US14031279

申请日：2013-09-19

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： In Ki LEE ,  Deock Gil OH ,  Ji Won JUNG ,  Min Hyuk KIM

IPC: H03M13/13

CPC classification number: H03M13/13 ,  H03M13/1165 ,  H03M13/611 ,  H03M13/6561

Abstract: Provided is a low density parity check (LDPC) encoding apparatus and method that may store M registers each including N bits, obtain N×M parity bits by performing a partial parallel operation an N×M number of times with respect to the M registers, and mutually invert subsequent N parity bits periodically, based on previous parity bits for each Nth parity bit of the N×M parity bits, respectively.

Abstract translation: 提供了一种低密度奇偶校验（LDPC）编码装置和方法，其可以存储每个包括N比特的M个寄存器，通过相对于M个寄存器执行N×M次次的部分并行操作来获得N×M个奇偶校验位， 并且分别基于N×M个奇偶校验位的每第N个奇偶校验位的先前奇偶校验位周期性地相互反转后续的N个奇偶校验位。