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Patent Agency Ranking
公开(公告)号：US12235346B2
公开(公告)日：2025-02-25
申请号：US17573177
申请日：2022-01-11
Inventor： Min Park , Bon Tae Koo , Kyung Hwan Park , Pil Jae Park , Jang Hong Choi
IPC: G01S13/536 , G01S7/35 , G01S13/58
Abstract: Disclosed is a radar device capable of operating in a dual mode, which includes a transmitter that includes a first signal generator that generates a Doppler radar signal and a second signal generator that generates a Frequency Modulated Continuous Wave (FMCW) radar signal, a receiver that receives a reflected signal reflected from a target and converts the reflected signal to a digital signal, a signal processing circuit that processes the digital signal differently depending on the dual mode to output an output signal, a signal analysis circuit that analyzes the output signal, and a controller that controls operations of the transmitter, the receiver, the signal processing circuit, and the signal analysis circuit, and the dual mode includes a first mode in which the first signal generator is activated and a second mode in which the second signal generator is activated.
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公开(公告)号：US11799424B2
公开(公告)日：2023-10-24
申请号：US17585009
申请日：2022-01-26
Inventor： Jang Hong Choi , Bon Tae Koo , Kyung Hwan Park , Min Park , Seon-Ho Han
CPC classification number: H03D3/247 , H03D3/02 , H03D7/00 , H03F3/04 , H04L27/22 , G01S7/354 , G01S7/358 , H03K2005/00078 , H03K2005/00286
Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.
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公开(公告)号：US12107555B2
公开(公告)日：2024-10-01
申请号：US17317483
申请日：2021-05-11
Inventor： Min Park , Jang Hong Choi , Bon Tae Koo , Kisu Kim , Kyung Hwan Park
CPC classification number: H03F3/245 , H03F3/2171 , H03G3/3042 , H03F2200/451
Abstract: Provided is a drive amplifier. A drive amplifier may include: a main circuit configured to receive an RF input signal and output a first RF output signal; and a selective bias adjustment circuit comprising a first common gate transistor to which a first common gate bias voltage is applied and a second common gate transistor to which a second common gate bias voltage is applied, and configured to output a second RF output signal using the first common gate transistor and the second common gate transistor.
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公开(公告)号：US09712123B2
公开(公告)日：2017-07-18
申请号：US15003669
申请日：2016-01-21
Inventor： Min Park , Baek-Hyun Kim , Cheon-Soo Kim , Song-Cheol Hong , Dong-Woo Kang , Jang-Hong Choi
CPC classification number: H03F1/42 , H03F1/0277 , H03F1/56 , H03F3/193 , H03F3/245 , H03F3/45188 , H03F3/72 , H03F2200/111 , H03F2200/451 , H03F2200/555 , H03F2203/45056 , H03F2203/7209
Abstract: Provided is a power amplifier installed in wireless communication terminals and systems. According to one aspect of the present invention, a reconfigurable power amplifier capable of selecting a wide band frequency is provided. The reconfigurable power amplifier includes input transistors receiving a radio frequency (RF) signal and a reconfigurable adaptive power cell configured to select the wide band frequency by applying a common-gate bias voltage to a plurality of common-gate transistors with a plurality of separate common gates to amplify the RF signal.
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公开(公告)号：US11837996B2
公开(公告)日：2023-12-05
申请号：US17585009
申请日：2022-01-26
Inventor： Jang Hong Choi , Bon Tae Koo , Kyung Hwan Park , Min Park , Seon-Ho Han
CPC classification number: H03D3/247 , H03D3/02 , H03D7/00 , H03F3/04 , H04L27/22 , G01S7/354 , G01S7/358 , H03K2005/00078 , H03K2005/00286
Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.
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