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    POWER SYSTEM BASED ON BETA SOURCE AND METHOD FOR OPERATING THE SAME
    1.
    发明申请
    POWER SYSTEM BASED ON BETA SOURCE AND METHOD FOR OPERATING THE SAME 有权

    公开(公告)号：US20230069909A1

    公开(公告)日：2023-03-09

    申请号：US17848855

    申请日：2022-06-24

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Seong Mo PARK ,  Byounggun CHOI ,  Bon Tae KOO ,  Young-Su KWON ,  Kyung Hwan PARK

    IPC: H01L31/02 ,  G01R31/382

    Abstract: Provided herein are a power system based on a beta source and an operating method thereof. The system includes a power generating section including a plurality of beta source-based generators, a power storage section including a plurality of power storages to store electrical energy which is generated from the generators, a multiplexer configured to select at least some of the storages, an optical power learning section to receive electrical signals provided from the storages, and estimate a state of charge (SOC) of each of the storages, through machine learning, an optimal power selecting section to select a power storage, which provides the optimal power, based on the SOC of each of the storages, an output section including a plurality of output devices to output power provided from the storage selected by the optimal power selecting section, and a de-multiplexer to select at least one output device of the output devices.

    NEUROMORPHIC ARITHMETIC DEVICE
    6.
    发明申请
    NEUROMORPHIC ARITHMETIC DEVICE 审中-公开

    公开(公告)号：US20180232635A1

    公开(公告)日：2018-08-16

    申请号：US15804912

    申请日：2017-11-06

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Kwang IL OH ,  Sung Eun KIM ,  Seong Mo PARK ,  Hyung-IL PARK ,  Jae-Jin LEE ,  Joo Hyun LEE

    IPC: G06N3/063 ,  G06F7/68 ,  G06F5/01

    CPC classification number: G06N3/0635 ,  G06F5/01 ,  G06F7/68 ,  H03K19/20

    Abstract: The present disclosure relates to a neuromorphic arithmetic device. The neuromorphic arithmetic device may include first and second synapse circuits, a charging/discharging circuit, a comparator, and a counter. The first synapse circuit may generate a first current by performing a first multiplication operation on a first PWM signal and a first weight, and the second synapse circuit may generate a second current by performing a second multiplication operation on a second PWM signal and a second weight. The charging/discharging circuit may store charges induced by the first current and the second current in a charging period, and may discharge the charges in a discharging period. The comparator may compare a voltage level of the charges discharged in the discharging period and a level of a reference voltage. The counter may count output pulses of an oscillator on the basis of a result of the comparison by the comparator.

    ELECTRONIC CIRCUIT FOR IMPLEMENTING GENERATIVE ADVERSARIAL NETWORK USING SPIKE NEURAL NETWORK
    8.
    发明申请
    ELECTRONIC CIRCUIT FOR IMPLEMENTING GENERATIVE ADVERSARIAL NETWORK USING SPIKE NEURAL NETWORK 审中-公开

    公开(公告)号：US20190392291A1

    公开(公告)日：2019-12-26

    申请号：US16445925

    申请日：2019-06-19

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Seong Mo PARK ,  Jae-Jin LEE ,  Sung Eun KIM ,  Kyung Hwan PARK ,  Mi Jeong PARK ,  Young Hwan BAE ,  Kwang IL OH ,  Byounggun CHOI

    IPC: G06N3/04

    Abstract: Provided is an electronic circuit for implementing a generative adversarial neural network. The electronic circuit includes a spike converter, a spike image generator, a spike image converter, and an image discriminator. The spike converter generates a first signal including spike signals. The number of the spike signals is determined based on first data associated with second data within a reference time interval. The spike image generator generates a second signal including spike signals being selected based on a weight among the spike signals of the first signal. The image converter converts the spike signals of the second signal to generate third data being represented in an analog domain. The image discriminator provides the spike image generator with result data being associated with a difference between a value of the third data and a value of the second data. The image generator determines the weight based on the result data.

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