公开(公告)号：US20160111382A1

公开(公告)日：2016-04-21

申请号：US14519291

申请日：2014-10-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Oliver Aubel ,  Georg Talut ,  Thomas Werner

IPC: H01L23/60 ,  H01L23/532

CPC classification number: H01L23/53214 ,  H01L21/76829 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53219 ,  H01L23/53228 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/53261 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1036 ,  H01L2224/05006 ,  H01L2224/05546

Abstract: The present disclosure relates to a semiconductor structure including a plurality of connecting lines arranged on a plurality of vertical levels, the plurality of connecting lines including at least a first connecting line arranged in a first vertical level and a second connecting line arranged in a second vertical level, different from the first vertical level, and a breakdown prevention layer placed in at least part of the vertical space separating the first connecting line from the second connecting line.

Abstract translation: 本公开涉及包括布置在多个垂直级上的多条连接线的半导体结构，所述多条连接线至少包括布置在第一垂直级中的第一连接线和布置在第二垂直方向上的第二连接线 与第一垂直水平不同的防水层，以及放置在将第一连接线与第二连接线分隔开的垂直空间的至少一部分中的击穿防止层。

公开(公告)号：US09362239B2

公开(公告)日：2016-06-07

申请号：US14519291

申请日：2014-10-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Oliver Aubel ,  Georg Talut ,  Thomas Werner

IPC: H01L23/52 ,  H01L23/60 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L23/53214 ,  H01L21/76829 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53219 ,  H01L23/53228 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/53261 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1036 ,  H01L2224/05006 ,  H01L2224/05546

Abstract: The present disclosure relates to a semiconductor structure including a plurality of connecting lines arranged on a plurality of vertical levels, the plurality of connecting lines including at least a first connecting line arranged in a first vertical level and a second connecting line arranged in a second vertical level, different from the first vertical level, and a breakdown prevention layer placed in at least part of the vertical space separating the first connecting line from the second connecting line.

Abstract translation: 本公开涉及包括布置在多个垂直级上的多条连接线的半导体结构，所述多条连接线至少包括布置在第一垂直级中的第一连接线和布置在第二垂直方向上的第二连接线 与第一垂直水平不同的防水层，以及放置在将第一连接线与第二连接线分隔开的垂直空间的至少一部分中的击穿防止层。

公开(公告)号：US10340229B2

公开(公告)日：2019-07-02

申请号：US15729774

申请日：2017-10-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Dirk Breuer ,  Georg Talut

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/768 ,  H01L23/00

Abstract: A semiconductor device comprises non-quadrangular metal regions in the last metallization layer and/or non-quadrangular contact pads, wherein, in some illustrative embodiments, an interdigitating lateral configuration may be obtained and/or an overlap of the contact pads with underlying metal regions may be provided. Consequently, mechanical robustness of the contact pads and the passivation material under the underlying interlayer dielectric material may be increased, thereby suppressing crack formation and crack propagation.

公开(公告)号：US20190109097A1

公开(公告)日：2019-04-11

申请号：US15729774

申请日：2017-10-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Dirk Breuer ,  Georg Talut

IPC: H01L23/00 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L23/562 ,  H01L21/76895 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/53228 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/04042 ,  H01L2224/05017 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2924/3512

Abstract: A semiconductor device comprises non-quadrangular metal regions in the last metallization layer and/or non-quadrangular contact pads, wherein, in some illustrative embodiments, an interdigitating lateral configuration may be obtained and/or an overlap of the contact pads with underlying metal regions may be provided. Consequently, mechanical robustness of the contact pads and the passivation material under the underlying interlayer dielectric material may be increased, thereby suppressing crack formation and crack propagation.