公开(公告)号：US20240363676A1

公开(公告)日：2024-10-31

申请号：US18767205

申请日：2024-07-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chi-Cheng CHEN ,  Wei-Li HUANG ,  Chun-Yi WU ,  Kuang-Yi WU ,  Hon-Lin HUANG ,  Chih-Hung SU ,  Chin-Yu KU ,  Chen-Shien CHEN

IPC分类号： H01F41/04 ,  H01L21/768 ,  H01L23/00 ,  H01L23/31 ,  H01L23/532

CPC分类号： H01L28/10 ,  H01F41/046 ,  H01L21/76823 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/53204 ,  H01L24/05 ,  H01L24/32 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05

摘要： A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a magnetic element over the substrate. The magnetic element has multiple sub-layers, and each sub-layer is wider than another sub-layer above it. The semiconductor device structure also includes an isolation layer extending exceeding edges the magnetic element, and the isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding the edges of the magnetic element.

公开(公告)号：US20240355886A1

公开(公告)日：2024-10-24

申请号：US18760960

申请日：2024-07-01

申请人： ROHM CO., LTD.

发明人： Yasuhiro KAWAKAMI

IPC分类号： H01L29/16 ,  H01L21/04 ,  H01L29/417 ,  H01L29/47 ,  H01L29/66 ,  H01L29/872

CPC分类号： H01L29/1608 ,  H01L21/0495 ,  H01L29/417 ,  H01L29/47 ,  H01L29/66143 ,  H01L29/872 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05552 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05666 ,  H01L2224/0568 ,  H01L2224/06181 ,  H01L2924/10272 ,  H01L2924/12032 ,  H01L2924/351

摘要： A semiconductor device according to the present invention includes a first conductive-type Sic semiconductor layer, and a Schottky metal, comprising molybdenum and having a thickness of 10 nm to 150 nm, that contacts the surface of the SiC semiconductor layer. The junction of the SiC semiconductor layer to the Schottky metal has a planar structure, or a structure with recesses and protrusions of equal to or less than 5 nm.

公开(公告)号：US12119338B2

公开(公告)日：2024-10-15

申请号：US18447655

申请日：2023-08-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Jie Chen ,  Ying-Ju Chen ,  Hsien-Wei Chen

IPC分类号： H01L21/44 ,  H01L21/56 ,  H01L21/683 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L23/12 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L23/544 ,  H01L23/58 ,  H01L25/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L25/50 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76838 ,  H01L21/78 ,  H01L23/12 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L23/562 ,  H01L23/585 ,  H01L24/06 ,  H01L24/19 ,  H01L24/20 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0657 ,  H01L24/32 ,  H01L24/48 ,  H01L25/105 ,  H01L2221/68372 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/2518 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/18165 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/73265 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/97 ,  H01L2224/73265 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/15311 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2924/00014 ,  H01L2224/85399

摘要： Semiconductor device packages, packaging methods, and packaged semiconductor devices are disclosed. In some embodiments, a package for a semiconductor device includes an integrated circuit die mounting region and a molding material disposed around the integrated circuit die mounting region. An interconnect structure is disposed over the molding material and the integrated circuit die mounting region. A protection pattern is disposed in a perimeter region of the package. The protection pattern includes a conductive feature.

公开(公告)号：US20240339439A1

公开(公告)日：2024-10-10

申请号：US18575910

申请日：2022-06-27

申请人： Vitesco Technologies Germany GmbH

发明人： Markus Hövermann ,  Michael Haber ,  Peter Krasselt ,  Martin Metzler ,  Martin Ehrmann

IPC分类号： H01L25/07 ,  H01L23/00 ,  H01L25/18 ,  H02M7/00

CPC分类号： H01L25/072 ,  H02M7/003 ,  H01L24/40 ,  H01L24/48 ,  H01L25/18 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/40227 ,  H01L2224/48157 ,  H01L2224/73221

摘要： A power half-bridge module may include: a busbar carrier with insulation embedding a first busbar with two longitudinal sections; a semiconductor carrier with a second busbar and a third busbar in a row in the longitudinal direction of the busbar carrier; a first semiconductor switch with a lower-side load-current contact area on the second busbar; and a second semiconductor switch with a lower-side load-current contact area on the third busbar. The first busbar has a contact area on the first section and a second contact area on the second section. The busbar carrier has a recess at the height of the second section and extending from one surface to another. The semiconductor carrier is arranged on the second surface of the busbar carrier so both switches protrude into the recess. The second switch has an upper-side load-current contact area electrically connected to the second contact area of the first busbar.

公开(公告)号：US20240321791A1

公开(公告)日：2024-09-26

申请号：US18604399

申请日：2024-03-13

申请人： SKYWORKS SOLUTIONS, INC.

发明人： Ki Wook LEE ,  Chien Jen WANG

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L2224/02215 ,  H01L2224/03019 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05557

摘要： According to certain aspects, a packaging substrate can include a plurality of layers including an outer layer, and one or more components on a surface of the outer layer. The one or more components can include a radio-frequency circuit, where the radio-frequency circuit is covered by a protective coating configured to reduce surface roughness of the outer layer and not covered by solder resist.

公开(公告)号：US20240304583A1

公开(公告)日：2024-09-12

申请号：US18606973

申请日：2024-03-15

申请人： Amkor Technology Singapore Holding Pte. Ltd.

发明人： Jong Sik Paek ,  Doo Hyun Park

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L25/10

CPC分类号： H01L24/17 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/85 ,  H01L25/105 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/85 ,  H01L2224/92125 ,  H01L2225/1011 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/19107 ,  H01L2924/3511

摘要： A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise forming a back end of line layer on a dummy substrate, completing at least a first portion of an assembly, and removing the dummy substrate.

公开(公告)号：US20240274557A1

公开(公告)日：2024-08-15

申请号：US18568291

申请日：2021-06-14

申请人： Mitsubishi Electric Corporation

发明人： Yo TANAKA ,  Tetsu NEGISHI ,  Seiji OKA

IPC分类号： H01L23/00 ,  H02M7/5387

CPC分类号： H01L24/05 ,  H01L24/04 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/03 ,  H01L24/29 ,  H01L24/32 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/03436 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05013 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05553 ,  H01L2224/05557 ,  H01L2224/05564 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0568 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40225 ,  H01L2224/40499 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/49111 ,  H01L2224/49176 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/0665 ,  H02M7/5387

摘要： A surface electrode on the front surface of a semiconductor element and a metal foil provided on the surface electrode are partially joined, which makes it possible to reduce stress generated at the end of the metal foil, prevent a failure resulting from a crack in the front surface of the semiconductor element, and enhance reliability of the semiconductor device. Such a semiconductor device includes a semiconductor element having a front surface and a back surface, a surface electrode formed on the front surface of the semiconductor element, and a metal foil partially joined onto an upper surface of the surface electrode.

公开(公告)号：US12057418B2

公开(公告)日：2024-08-06

申请号：US17818736

申请日：2022-08-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hung-Shu Huang ,  Ming-Chyi Liu

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/532

CPC分类号： H01L24/05 ,  H01L23/3171 ,  H01L23/4952 ,  H01L23/49866 ,  H01L23/53295 ,  H01L24/03 ,  H01L2224/04042 ,  H01L2224/0558 ,  H01L2224/05686

摘要： A method includes depositing a first dielectric layer covering an electrical connector, depositing a second dielectric layer over the first dielectric layer, and performing a first etching process to etch-through the second dielectric layer and the first dielectric layer. An opening is formed in the first dielectric layer and the second dielectric layer to reveal the electrical connector. A second etching process is performed to laterally etch the first dielectric layer and the second dielectric layer. An isolation layer is deposited to extend into the opening. The isolation layer has a vertical portion and a first horizontal portion in the opening, and a second horizontal portion overlapping the second dielectric layer. An anisotropic etching process is performed on the isolation layer, with the vertical portion of the isolation layer being left in the opening.

公开(公告)号：US12046541B2

公开(公告)日：2024-07-23

申请号：US18301807

申请日：2023-04-17

申请人： ROHM CO., LTD.

发明人： Katsuhiro Iwai

IPC分类号： H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L23/49548 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49582 ,  H01L23/562 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/3512 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/73265 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/48465 ,  H01L2224/48247 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/48465 ,  H01L2224/48247 ,  H01L2924/00

摘要： A semiconductor device includes a plurality of leads, a semiconductor element electrically connected to the leads and supported by one of the leads, and a sealing resin covering the semiconductor element and a part of each lead. The sealing resin includes a first edge, a second edge perpendicular to the first edge, and a center line parallel to the first edge. The reverse surfaces of the respective leads include parts exposed from the sealing resin, and the exposed parts include an outer reverse-surface mount portion and an inner reverse-surface mount portion that are disposed along the second edge of the sealing resin. The inner reverse-surface mount portion is closer to the center line of the sealing resin than is the outer reverse-surface mount portion. The outer reverse-surface mount portion is greater in area than the inner reverse-surface mount portion.

公开(公告)号：US20240243082A1

公开(公告)日：2024-07-18

申请号：US18400164

申请日：2023-12-29

申请人： NEC Corporation

发明人： Tomohiro YAMAJI ,  Ayuka TADA

IPC分类号： H01L23/00 ,  H10N60/80

CPC分类号： H01L24/05 ,  H01L24/04 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H10N60/80 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05624 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/49111 ,  H01L2224/49176

摘要： Provided is a quantum chip that includes a substrate, a superconducting layer formed on a surface of the substrate, an electrode formed on a surface of the superconducting layer along an outer edge of the substrate, and a periodic structure formed on a surface of the superconducting layer along an outer edge of the substrate.