公开(公告)号：US08904335B2

公开(公告)日：2014-12-02

申请号：US13849575

申请日：2013-03-25

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hidekazu Yoshida ,  Lei Yuan ,  Paul Mesa

IPC: G06F17/50

CPC classification number: G06F17/5081

Abstract: Evaluation of electrical accessibility within a layer of a circuit to pin geometries residing within a cell boundary of the circuit is provided. The evaluating includes, for instance, checking along substantially parallel pin geometry access paths of the layer to determine possible points at which a respective pin geometry of the pin geometries within the cell boundary may be accessed. The evaluating also includes identifying which points of the possible points are accessible access points by any route of the possible routes for electrically connecting to a respective pin geometry of the pin geometries from a first side or a second side of the cell boundary, wherein at least one point of the possible points is identified as not being an accessible access point based on the at least one point being inaccessible by the possible routes.

Abstract translation: 提供了评估电路层内的电可访问性以引导驻留在电路的单元边界内的几何形状。 评估包括例如沿着层的基本平行的针几何访问路径进行检查，以确定可以访问单元边界内的针几何形状的相应销几何形状的可能点。 评估还包括通过用于电连接到细胞边界的第一侧或第二侧的针几何形状的相应针几何形状的可能路线的任何路线来识别可能点的哪些点是可访问的接入点，其中至少 基于可能的路线不可访问的至少一个点，可能点的一点被识别为不是可访问的接入点。

公开(公告)号：US20140327146A1

公开(公告)日：2014-11-06

申请号：US13874803

申请日：2013-05-01

Applicant: Globalfoundries Inc

Inventor： Yunfei Deng ,  Lei Yuan ,  Hidekazu Yoshida ,  Juhan Kim ,  Mahbub Rashed ,  Jongwook Kye

IPC: G06F17/50 ,  H01L23/48

CPC classification number: G06F17/5077 ,  G06F17/5072 ,  H01L27/0207 ,  H01L27/11807 ,  H01L2027/11831 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A design methodology for routing for an integrated circuit is disclosed. The method includes placement of cells having double diffusion breaks, which create an extended intercell region. Metal layer prohibit zones are defined to prohibit any M1 structures in the prohibit zones. Metal layer allow zones are placed adjacent to outer metal lines, and jogs are formed in the metal layer allow zones. Vias and viabars may then be applied on the jogs.

Abstract translation: 公开了用于集成电路布线的设计方法。 该方法包括放置具有双扩散断裂的电池，这产生扩展的电池间​​区域。 金属层禁止区被定义为禁止禁区内的任何M1结构。 金属层允许区域邻近外部金属线放置，并且在金属层中形成点动允许区域。 然后将通风口和viabars应用于慢跑。

公开(公告)号：US08881083B1

公开(公告)日：2014-11-04

申请号：US13874803

申请日：2013-05-01

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Yunfei Deng ,  Lei Yuan ,  Hidekazu Yoshida ,  Juhan Kim ,  Mahbub Rashed ,  Jongwook Kye

IPC: G06F17/50 ,  H01L23/48

CPC classification number: G06F17/5077 ,  G06F17/5072 ,  H01L27/0207 ,  H01L27/11807 ,  H01L2027/11831 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A design methodology for routing for an integrated circuit is disclosed. The method includes placement of cells having double diffusion breaks, which create an extended intercell region. Metal layer prohibit zones are defined to prohibit any M1 structures in the prohibit zones. Metal layer allow zones are placed adjacent to outer metal lines, and jogs are formed in the metal layer allow zones. Vias and viabars may then be applied on the jogs.

Abstract translation: 公开了用于集成电路布线的设计方法。 该方法包括放置具有双扩散断裂的电池，这产生扩展的电池间​​区域。 金属层禁止区被定义为禁止禁区内的任何M1结构。 金属层允许区域邻近外部金属线放置，并且在金属层中形成点动允许区域。 然后将通风口和viabars应用于慢跑。

公开(公告)号：US20140289695A1

公开(公告)日：2014-09-25

申请号：US13849575

申请日：2013-03-25

Applicant: GLOBALFOUNDRIES INC.

Inventor： Hidekazu Yoshida ,  Lei Yuan ,  Paul Mesa

IPC: G06F17/50

CPC classification number: G06F17/5081

Abstract: Evaluation of electrical accessibility within a layer of a circuit to pin geometries residing within a cell boundary of the circuit is provided. The evaluating includes, for instance, checking along substantially parallel pin geometry access paths of the layer to determine possible points at which a respective pin geometry of the pin geometries within the cell boundary may be accessed. The evaluating also includes identifying which points of the possible points are accessible access points by any route of the possible routes for electrically connecting to a respective pin geometry of the pin geometries from a first side or a second side of the cell boundary, wherein at least one point of the possible points is identified as not being an accessible access point based on the at least one point being inaccessible by the possible routes.

Abstract translation: 提供了评估电路层内的电可访问性以引导驻留在电路的单元边界内的几何形状。 评估包括例如沿着层的基本平行的针几何访问路径进行检查，以确定可以访问单元边界内的针几何形状的相应销几何形状的可能点。 评估还包括通过用于电连接到细胞边界的第一侧或第二侧的针几何形状的相应针几何形状的可能路线的任何路线来识别可能点的哪些点是可访问的接入点，其中至少 基于可能的路线不可访问的至少一个点，可能点的一点被识别为不是可访问的接入点。