METHOD, APPARATUS AND SYSTEM FOR WIDE METAL LINE FOR SADP ROUTING

    公开(公告)号:US20210027005A1

    公开(公告)日:2021-01-28

    申请号:US17070708

    申请日:2020-10-14

    发明人: Lei Yuan Juhan Kim

    摘要: At least one method, apparatus and system disclosed involves a circuit layout for an integrated circuit device comprising a plurality of wider-than-default metal formations for a functional cell. A design for an integrated circuit device is received. The design comprises at least one functional cell. A first pair of wide metal formations are provided. The first pair of wide metal formations comprise a first metal formation and a second metal placed about a first cell boundary of the functional cell for providing additional space for routing, for high-drive routing, and/or for power routing.

    Method, apparatus, and system for improved standard cell design and routing for improving standard cell routability

    公开(公告)号:US09727685B2

    公开(公告)日:2017-08-08

    申请号:US14712830

    申请日:2015-05-14

    IPC分类号: G06F17/50

    摘要: At least one method, apparatus and system disclosed involves circuit layout for an integrated circuit device. A design for an integrated circuit device is received. The design comprises a functional cell. A first substitute functional cell for a first value of shift of a set of routing tracks respective to the boundary of the functional cell is provided. The first substitute functional cell comprises at least one pin moved by an amount of the first value. A determination is made as to whether an amount of shift of the set of routing tracks corresponds to the first value. The functional cell is replaced with the first substitute functional cell in response to a determination that the amount of shift of the set of routing tracks corresponds to the first value.

    Methods of cross-coupling line segments on a wafer
    6.
    发明授权
    Methods of cross-coupling line segments on a wafer 有权
    交叉耦合晶片上的线段的方法

    公开(公告)号:US09472455B2

    公开(公告)日:2016-10-18

    申请号:US14246197

    申请日:2014-04-07

    摘要: A method is provided for fabricating cross-coupled line segments on a wafer for use, for instance, in fabricating cross-coupled gates of two or more transistors. The fabricating includes: patterning a first line segment with a first side projection using a first mask; and patterning a second line segment with a second side projection using a second mask. The second line segment is offset from the first line segment, and the patterned second side projection overlies the patterned first side projection, and facilitates defining a cross-stitch segment connecting the first and second line segments. The method further includes selectively cutting the first and second line segments in defining the cross-coupled line segments from the first and second line segments and the cross-stitch segment.

    摘要翻译: 提供了一种用于在晶片上制造交叉耦合线段以用于例如制造两个或多个晶体管的交叉耦合栅极的方法。 该制造包括:使用第一掩模使具有第一侧面突起的第一线段图案化; 以及使用第二掩模用第二侧面突起构图第二线段。 第二线段与第一线段偏移,并且图案化的第二侧突起覆盖图案化的第一侧突起,并且有助于限定连接第一和第二线段的十字绣线段。 该方法还包括在限定来自第一和第二线段和十字绣段的交叉耦合线段时选择性地切割第一和第二线段。

    Self-aligned double patterning process for two dimensional patterns
    7.
    发明授权
    Self-aligned double patterning process for two dimensional patterns 有权
    用于二维图案的自对准双重图案化工艺

    公开(公告)号:US09437481B2

    公开(公告)日:2016-09-06

    申请号:US14674792

    申请日:2015-03-31

    摘要: One method includes forming a mandrel element above a hard mask layer, forming first and second spacers on the mandrel element, removing the mandrel element, a first opening being defined between the first and second spacers and exposing a portion of the hard mask layer and having a longitudinal axis extending in a first direction, forming a block mask covering a middle portion of the first opening, the block mask having a longitudinal axis extending in a second direction different than the first direction, etching the hard mask layer in the presence of the block mask and the first and second spacers to define aligned first and second line segment openings in the hard mask layer extending in the first direction, etching recesses in a dielectric layer disposed beneath the hard mask layer based on the first and second line segment openings, and filling the recesses with a conductive material.

    摘要翻译: 一种方法包括在硬掩模层之上形成心轴元件,在心轴元件上形成第一和第二间隔物,去除心轴元件,限定在第一和第二间隔物之间​​的第一开口,并暴露硬掩模层的一部分并具有 沿第一方向延伸的纵轴,形成覆盖所述第一开口的中间部分的阻挡掩模,所述阻挡掩模具有在与所述第一方向不同的第二方向上延伸的纵向轴线;在所述阻挡掩模的存在下, 阻挡掩模和所述第一和第二间隔物,以限定在所述硬掩模层中沿所述第一方向延伸的对准的第一和第二线段开口,基于所述第一和第二线段开口蚀刻设置在所述硬掩模层下方的电介质层中的凹陷, 并用导电材料填充凹部。

    Methods of patterning line-type features using a multiple patterning process that enables the use of tighter contact enclosure spacing rules
    8.
    发明授权
    Methods of patterning line-type features using a multiple patterning process that enables the use of tighter contact enclosure spacing rules 有权
    使用能够使用更紧密的接触外壳间隔规则的多重图案化工艺来图案化线型特征的方法

    公开(公告)号:US09287131B2

    公开(公告)日:2016-03-15

    申请号:US14186396

    申请日:2014-02-21

    摘要: A method involving identifying a pattern for an overall target cut mask to be used in patterning line-type features that includes a target non-rectangular opening feature having an inner, concave corner, decomposing the overall target cut mask pattern into first and second sub-target patterns, wherein the first sub-target pattern comprises a first rectangular-shaped opening feature corresponding to a first portion, but not all, of the target non-rectangular opening feature and the second sub-target pattern comprises a second rectangular-shaped opening feature corresponding to a second portion, but not all, of the target non-rectangular opening feature, the first and second openings overlapping adjacent the inner, concave corner, and generating first and second sets of mask data corresponding to the first and second sub-target patterns, wherein at least one of the first and second sets of mask data is generated based upon an identified contact-to-end-of-cut-line spacing rule.

    摘要翻译: 一种涉及识别用于构图线型特征的整体目标切割掩模的图案的方法,所述线型特征包括具有内凹角的目标非矩形开口特征,将总体目标切割掩模图案分解为第一和第二子图, 目标图案,其中所述第一子目标图案包括与所述目标非矩形开口特征和所述第二子目标图案的第一部分但不是全部相对应的第一矩形开口特征,所述第一子目标图案包括第二矩形开口特征, 特征对应于目标非矩形开口特征的第二部分但不是全部,第一和第二开口与内凹角相邻重叠,并且生成对应于第一和第二子图的第一和第二组掩模数据, 目标图案,其中基于所识别的切割线间距规则,生成第一组和第二组掩模数据中的至少一个。

    Method for off-grid routing structures utilizing self aligned double patterning (SADP) technology
    9.
    发明授权
    Method for off-grid routing structures utilizing self aligned double patterning (SADP) technology 有权
    采用自对准双重图案(SADP)技术的离网布线结构的方法

    公开(公告)号:US09147653B2

    公开(公告)日:2015-09-29

    申请号:US14513834

    申请日:2014-10-14

    摘要: A method for efficient off-track routing and the resulting device are disclosed. Embodiments include: providing a hardmask on a substrate; providing a plurality of first mandrels on the hardmask; providing a first spacer on each side of each of the first mandrels; providing a plurality of first non-mandrel regions of the substrate being separated from the first mandrels and between two of the first spacers, each of the first mandrels, first non-mandrel regions, and first spacers having a width equal to a distance; and providing a second mandrel having a width of at least twice the distance and being separated from one of the first non-mandrel regions by a second spacer.

    摘要翻译: 公开了一种用于有效的非轨道路由的方法以及所得到的设备。 实施例包括:在基板上提供硬掩模; 在硬掩模上提供多个第一心轴; 在每个所述第一心轴的每一侧上提供第一间隔件; 提供所述基板的多个第一非心轴区域与所述第一心轴分开并且在所述第一间隔件中的两个之间,所述第一心轴,第一非心轴区域和第一间隔件中的每一个具有等于一定距离的宽度; 以及提供具有至少两倍距离的宽度的第二心轴,并且通过第二间隔件与第一非心轴区域之一分离。

    Methods of generating circuit layouts that are to be manufactured using SADP routing techniques and virtual non-mandrel mask rules
    10.
    发明授权
    Methods of generating circuit layouts that are to be manufactured using SADP routing techniques and virtual non-mandrel mask rules 有权
    使用SADP路由技术和虚拟非心轴掩码规则生成电路布局的方法

    公开(公告)号:US08954913B1

    公开(公告)日:2015-02-10

    申请号:US14043251

    申请日:2013-10-01

    IPC分类号: G06F17/50

    摘要: One method disclosed herein involves, among other things, generating a set of mandrel mask rules, block mask rules and a virtual, software-based non-mandrel-metal mask. The method also includes creating a set of virtual non-mandrel mask rules that is a replica of the mandrel mask rules, generating a set of metal routing design rules based upon the mandrel mask rules, the block mask rules and the virtual non-mandrel mask rules, generating the circuit routing layout based upon the metal routing design rules, decomposing the circuit routing layout into a mandrel mask pattern and a block mask pattern, generating a first set of mask data corresponding to the mandrel mask pattern, and generating a second set of mask data corresponding to the block mask pattern.

    摘要翻译: 本文公开的一种方法尤其涉及生成一组心轴掩模规则,块掩模规则和基于软件的虚拟金属掩模。 该方法还包括创建一组虚拟非心轴掩模规则,该规则是心轴掩模规则的副本,基于心轴掩模规则,块掩模规则和虚拟非心轴掩模生成一组金属路由设计规则 规则,基于金属路由设计规则生成电路布线布局,将电路路由布局分解为心轴掩模图案和块掩模图案,产生对应于心​​轴掩模图案的第一组掩模数据,以及生成第二组 对应于块掩模图案的掩模数据。