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公开(公告)号:US10833169B1
公开(公告)日:2020-11-10
申请号:US16390473
申请日:2019-04-22
Applicant: GLOBALFOUNDRIES INC.
Inventor: Tao Chu , Rongtao Lu , Ayse M. Ozbek , Wei Ma , Haiting Wang
IPC: H01L29/66 , H01L29/423 , H01L29/78 , H01L29/40 , H01L21/311 , H01L21/32 , H01L21/3105 , H01L21/3205 , H01L21/3213 , H01L21/321
Abstract: Disclosed is a metal gate (e.g., a replacement metal gate (RMG) for a field effect transistor (FET) and a method of forming the metal gate. The method includes depositing a conformal dielectric layer to line a gate opening and performing a series of unclustered and clustered conformal metal deposition and chamfer processes to selectively adjust the heights of conformal metal layers within the gate opening. By selectively controlling the heights of the conformal metal layers, the method provides improved overall gate height control and gate quality particularly when the metal gate has a small critical dimension (CD) and/or a high aspect ratio (AR). The method can also include using different etch techniques during the different chamfer processes and, particularly, when different materials and/or different material interfaces are exposed to an etchant in order to ensure an essentially uniform etch rate of the conformal metal layer(s) at issue in a direction that is essentially vertical.
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公开(公告)号:US20200335602A1
公开(公告)日:2020-10-22
申请号:US16390473
申请日:2019-04-22
Applicant: GLOBALFOUNDRIES INC.
Inventor: Tao Chu , Rongtao Lu , Ayse M. Ozbek , Wei Ma , Haiting Wang
IPC: H01L29/66 , H01L29/40 , H01L29/423 , H01L29/78 , H01L21/3105 , H01L21/311 , H01L21/3205 , H01L21/3213
Abstract: Disclosed is a metal gate (e.g., a replacement metal gate (RMG) for a field effect transistor (FET) and a method of forming the metal gate. The method includes depositing a conformal dielectric layer to line a gate opening and performing a series of unclustered and clustered conformal metal deposition and chamfer processes to selectively adjust the heights of conformal metal layers within the gate opening. By selectively controlling the heights of the conformal metal layers, the method provides improved overall gate height control and gate quality particularly when the metal gate has a small critical dimension (CD) and/or a high aspect ratio (AR). The method can also include using different etch techniques during the different chamfer processes and, particularly, when different materials and/or different material interfaces are exposed to an etchant in order to ensure an essentially uniform etch rate of the conformal metal layer(s) at issue in a direction that is essentially vertical.
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公开(公告)号:US10600876B2
公开(公告)日:2020-03-24
申请号:US15974037
申请日:2018-05-08
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Guowei Xu , Hui Zang , Rongtao Lu
IPC: H01L29/40 , H01L29/66 , H01L21/311 , H01L21/3213
Abstract: A method includes forming a first cavity having a first width and a second cavity having a second width greater than the first width in a dielectric material, forming a first conformal layer in the first and second cavities, forming spacers in the first and second cavities, the spacers covering a first portion of the first conformal layer positioned on sidewalls of the first and second cavities and exposing a second portion of the first conformal layer positioned on the sidewalls of the first and second cavities, forming a material layer in the first and second cavities to cover bottom portions of the first conformal layer, performing a first etch process to remove the second portion of the first conformal layer positioned on the sidewalls of the first and second cavities, removing the spacers and the material layer, and forming a fill material in the first and second cavities.
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