公开(公告)号：US20150270364A1

公开(公告)日：2015-09-24

申请号：US14730887

申请日：2015-06-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Tsung-Liang CHEN ,  Hung-Wei LIU ,  Rohit PAL ,  Hsin-Neng TAI ,  Huey-Ming WANG ,  Tae Hoon LEE ,  Songkram SRIVATHANAKUL ,  Danni CHEN

IPC: H01L29/423 ,  H01L27/092

CPC classification number: H01L29/42364 ,  H01L21/823828 ,  H01L21/823857 ,  H01L21/823864 ,  H01L27/092

Abstract: Methods of facilitating gate height uniformity by controlling recessing of dielectric material and semiconductor devices formed from the methods are provided. The methods include, for instance, forming a transistor of the semiconductor device with an n-type transistor and a p-type transistor, the n-type transistor and the p-type transistor including plurality of sacrificial gate structures and protective masks at upper surfaces of the plurality of sacrificial gate structures; providing a dielectric material over and between the plurality of sacrificial gate structures; partially densifying the dielectric material to form a partially densified dielectric material; further densifying the partially densified dielectric material to create a modified dielectric material; and creating substantially planar surface on the modified dielectric material, to control dielectric material recess and gate height.

Abstract translation: 提供了通过控制由这些方法形成的介电材料和半导体器件的凹陷来促进栅极高度均匀性的方法。 所述方法包括例如用n型晶体管和p型晶体管形成半导体器件的晶体管，n型晶体管和p型晶体管包括多个牺牲栅极结构和在上表面处的保护掩模 的多个牺牲栅极结构; 在多个牺牲栅极结构之上和之间提供电介质材料; 部分致密化介电材料以形成部分致密化的电介质材料; 进一步致密化部分致密化的介电材料以产生改性的介电材料; 以及在改性介电材料上形成基本平坦的表面，以控制电介质材料凹陷和栅极高度。

公开(公告)号：US20170053794A1

公开(公告)日：2017-02-23

申请号：US14832246

申请日：2015-08-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hong Jin KIM ,  Liqiao QIN ,  Sumeet KASHYAP ,  Dinesh KOLI ,  Andrew KRANICK ,  Tae Hoon LEE ,  Hyucksoo YANG ,  Jason MAZZOTTI

IPC: H01L21/02 ,  H01L21/66 ,  H01L21/67 ,  H01L21/306

CPC classification number: H01L21/67253 ,  H01L21/02052 ,  H01L21/67046 ,  H01L21/67051 ,  H01L22/12 ,  H01L22/26

Abstract: A method and apparatus are provided for automatically controlling the position of the spray bars and nozzles and the spray flow of a CMP in-situ cleaning module. Embodiments include fixing a wafer to a CMP cleaning module, the cleaning module having a first and a second group of spray bars and nozzles, the first and second groups of spray bars and nozzles being located proximate to opposite surfaces of the wafer; cleaning one or more of the surfaces of the wafer with a chemical spray forced through at least one of the groups of spray bars and nozzles; determining a measured profile of the one or more surfaces of the wafer; comparing the measured profile against a target profile; and adjusting automatically at least one of the first and second groups of spray bars and nozzles relative to the one or more surfaces of the wafer based on the comparison.

Abstract translation: 提供了一种用于自动控制喷杆和喷嘴的位置以及CMP原位清洁模块的喷射流的方法和装置。 实施例包括将晶片固定到CMP清洁模块，清洁模块具有第一组和第二组喷杆和喷嘴，第一组和第二组喷杆和喷嘴位于晶片相对表面附近; 用强制通过喷雾棒和喷嘴组中的至少一个的化学喷雾清洁晶片的一个或多个表面; 确定所述晶片的所述一个或多个表面的测量轮廓; 将测量的轮廓与目标轮廓进行比较; 并且基于所述比较，相对于所述晶片的所述一个或多个表面自动调整所述第一组和第二组喷杆和喷嘴中的至少一个。

公开(公告)号：US20150084131A1

公开(公告)日：2015-03-26

申请号：US14032740

申请日：2013-09-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Tsung-Liang CHEN ,  Hung-Wei LIU ,  Rohit PAL ,  Hsin-Neng TAI ,  Huey-Ming WANG ,  Tae Hoon LEE ,  Songkram SRIVATHANAKUL ,  Danni CHEN

IPC: H01L21/8238 ,  H01L27/092

CPC classification number: H01L29/42364 ,  H01L21/823828 ,  H01L21/823857 ,  H01L21/823864 ,  H01L27/092

Abstract: Methods of facilitating gate height uniformity by controlling recessing of dielectric material and semiconductor devices formed from the methods are provided. The methods include, for instance, forming a transistor of the semiconductor device with an n-type transistor and a p-type transistor, the n-type transistor and the p-type transistor including plurality of sacrificial gate structures and protective masks at upper surfaces of the plurality of sacrificial gate structures; providing a dielectric material over and between the plurality of sacrificial gate structures; partially densifying the dielectric material to form a partially densified dielectric material; further densifying the partially densified dielectric material to create a modified dielectric material; and creating substantially planar surface on the modified dielectric material, to control dielectric material recess and gate height.