公开(公告)号：US20140367751A1

公开(公告)日：2014-12-18

申请号：US13918622

申请日：2013-06-14

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hong YU ,  Hyucksoo YANG ,  Puneet KHANNA

IPC: H01L21/28 ,  H01L21/306 ,  H01L29/78

CPC classification number: H01L29/785 ,  H01L21/823431 ,  H01L29/66795

Abstract: A method for etching FinFET spacers by inserting a Si recess step directly after the traditional spacer ME step and the resulting device are provided. Embodiments include forming a gate on a substrate having a silicon fin, the gate having a nitride cap on an upper surface thereof and an oxide cap on an upper surface of the nitride cap; forming a dielectric layer over the silicon fin and the gate; removing the dielectric layer from an upper surface of the oxide cap and an upper surface of the silicon fin; recessing the silicon fin; and removing the dielectric layer from side surfaces of the silicon fin and the remaining silicon fin.

Abstract translation: 通过在传统的间隔物ME步骤之后直接插入Si凹陷步骤和所得到的器件来蚀刻FinFET间隔物的方法。 实施例包括在具有硅翅片的基板上形成栅极，栅极在其上表面具有氮化物盖，在氮化物盖的上表面上具有氧化物盖; 在所述硅片和所述栅极上形成介电层; 从所述氧化物盖的上表面和所述硅片的上表面去除所述电介质层; 凹陷硅片; 并且从硅片和剩余的硅片的侧表面去除电介质层。

公开(公告)号：US20170053794A1

公开(公告)日：2017-02-23

申请号：US14832246

申请日：2015-08-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hong Jin KIM ,  Liqiao QIN ,  Sumeet KASHYAP ,  Dinesh KOLI ,  Andrew KRANICK ,  Tae Hoon LEE ,  Hyucksoo YANG ,  Jason MAZZOTTI

IPC: H01L21/02 ,  H01L21/66 ,  H01L21/67 ,  H01L21/306

CPC classification number: H01L21/67253 ,  H01L21/02052 ,  H01L21/67046 ,  H01L21/67051 ,  H01L22/12 ,  H01L22/26

Abstract: A method and apparatus are provided for automatically controlling the position of the spray bars and nozzles and the spray flow of a CMP in-situ cleaning module. Embodiments include fixing a wafer to a CMP cleaning module, the cleaning module having a first and a second group of spray bars and nozzles, the first and second groups of spray bars and nozzles being located proximate to opposite surfaces of the wafer; cleaning one or more of the surfaces of the wafer with a chemical spray forced through at least one of the groups of spray bars and nozzles; determining a measured profile of the one or more surfaces of the wafer; comparing the measured profile against a target profile; and adjusting automatically at least one of the first and second groups of spray bars and nozzles relative to the one or more surfaces of the wafer based on the comparison.

Abstract translation: 提供了一种用于自动控制喷杆和喷嘴的位置以及CMP原位清洁模块的喷射流的方法和装置。 实施例包括将晶片固定到CMP清洁模块，清洁模块具有第一组和第二组喷杆和喷嘴，第一组和第二组喷杆和喷嘴位于晶片相对表面附近; 用强制通过喷雾棒和喷嘴组中的至少一个的化学喷雾清洁晶片的一个或多个表面; 确定所述晶片的所述一个或多个表面的测量轮廓; 将测量的轮廓与目标轮廓进行比较; 并且基于所述比较，相对于所述晶片的所述一个或多个表面自动调整所述第一组和第二组喷杆和喷嘴中的至少一个。

公开(公告)号：US20150017774A1

公开(公告)日：2015-01-15

申请号：US13938786

申请日：2013-07-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： Wei Hua TONG ,  Hong YU ,  Jin Ping LIU ,  Hyucksoo YANG ,  Lun ZHAO ,  Chandra REDDY

IPC: H01L29/66 ,  H01L21/02

CPC classification number: H01L29/7848 ,  H01L21/02057 ,  H01L21/02236 ,  H01L21/823431 ,  H01L29/7854

Abstract: Thermal oxidation treatment methods and processes used during fabrication of semiconductor devices are provided. One method includes, for instance: obtaining a device with at least one cavity etched into the device; performing a thermal oxidation treatment to the at least one cavity; and cleaning the at least one cavity. One process includes, for instance: providing a semiconductor device with a substrate, at least one layer over the substrate and at least one fin; forming at least one gate over the fin; doping at least one region below the fin; applying a spacer layer over the device; etching the spacer layer to expose at least a portion of the gate material; etching a cavity into the at least one fin; etching a shaped opening into the cavity; performing thermal oxidation processing on the at least one cavity; and growing at least one epitaxial layer on an interior surface of the cavity.

Abstract translation: 提供了在制造半导体器件期间使用的热氧化处理方法和工艺。 一种方法包括例如：获得具有蚀刻到该装置中的至少一个腔的装置; 对所述至少一个腔进行热氧化处理; 以及清洁所述至少一个腔。 一个过程包括例如：提供具有衬底的半导体器件，衬底上的至少一个层和至少一个鳍; 在翅片上形成至少一个闸门; 掺杂鳍片以下的至少一个区域; 在该装置上施加间隔层; 蚀刻间隔层以露出栅极材料的至少一部分; 将空腔蚀刻到所述至少一个翅片中; 将成形的开口蚀刻到空腔中; 在所述至少一个腔体上进行热氧化处理; 以及在腔的内表面上生长至少一个外延层。

公开(公告)号：US20150129983A1

公开(公告)日：2015-05-14

申请号：US14079757

申请日：2013-11-14

Applicant: Globalfoundries Inc.

Inventor： Hong YU ,  Hyucksoo YANG ,  Bingwu LIU ,  Puneet KHANNA ,  Lun ZHAO

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L29/66795 ,  H01L29/785

Abstract: Fin-type transistor fabrication methods and structures are provided having extended embedded stress elements. The methods include, for example: providing a gate structure extending over a fin extending above a substrate; using isotropic etching and anisotropic etching to form an extended cavity within the fin, where the extended cavity in part undercuts the gate structure, and where the using of the isotropic etching and the anisotropic etching deepens the extended cavity into the fin below the undercut gate structure; and forming an embedded stress element at least partially within the extended cavity, including below the gate structure.

Abstract translation: 鳍型晶体管制造方法和结构被提供具有延伸的嵌入应力元件。 所述方法包括例如：提供在衬底上延伸的翅片上延伸的栅极结构; 使用各向同性蚀刻和各向异性蚀刻在翅片内形成延伸空腔，其中延伸空腔部分地削弱了栅极结构，并且其中使用各向同性蚀刻和各向异性蚀刻将扩展腔加深到底切栅结构下方的翅片 ; 以及至少部分地在所述延伸空腔内形成嵌入的应力元件，包括在所述栅极结构下方。