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1.发明授权Test then destroy technique for security-focused semiconductor integrated circuits 有权测试然后破坏安全性半导体集成电路的技术公开(公告)号：US09343377B1
公开(公告)日：2016-05-17
申请号：US14592249
申请日：2015-01-08
Applicant: Google Inc.
Inventor： Andy Yang , Benjamin Iver Gribstad , Don Stark , Shahriar Rabii , Srenik Mehta
IPC: H01L21/66 , H01L21/82 , H01L21/768
CPC classification number: H01L21/76892 , G01R31/31719 , H01L22/14 , H01L22/20
Abstract: A method includes forming an integrated circuit device having device circuitry disposed in a device circuitry area on a substrate and a destroyable circuit formed in a destroyable circuitry area on the substrate; testing at least one operational aspect of the device circuitry using the destroyable circuit; and destroying the destroyable circuit subsequent to testing the at least one operational aspect of the device circuitry.
Abstract translation: 一种方法包括形成集成电路装置，其具有设置在衬底上的器件电路区域中的器件电路和形成在衬底上的可破坏电路区域中的可破坏电路; 使用可破坏电路测试设备电路的至少一个操作方面; 以及在测试所述设备电路的至少一个操作方面之后破坏所述可破坏的电路。
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公开(公告)号：US09171642B2
公开(公告)日：2015-10-27
申请号：US14285660
申请日：2014-05-23
Applicant: Google Inc.
Inventor： Lynn Bos , Arnold Feldman , Shahriar Rabii
CPC classification number: G11C27/028 , G11C27/02 , G11C27/024
Abstract: A circuit with a sampling network may include a pair of capacitors, where each of the capacitors has a first node and a second node; a first pair of switches communicatively coupling corresponding differential input voltage signals to the first node of each of the capacitors; and a second pair of switches communicatively coupling the second node of each of the capacitors to a common mode voltage source. Corresponding differential output voltage signals at the second node of each of the capacitors may be communicatively coupled using a differential switch. The second pair of switches may be coupled in parallel with the differential switch. A clock signal of the differential switch may be de-asserted prior to de-asserting corresponding clock signals for each of the second pair of switches.
Abstract translation: 具有采样网络的电路可以包括一对电容器，其中每个电容器具有第一节点和第二节点; 第一对开关，其将相应的差分输入电压信号通信耦合到每个电容器的第一节点; 以及第二对开关，其将每个电容器的第二节点通信地耦合到共模电压源。 每个电容器的第二节点处的对应差分输出电压信号可以使用差分开关通信耦合。 第二对开关可以与差动开关并联。 差分开关的时钟信号可以在对于第二对开关中的每一个的对应时钟信号解除置位之前被解除断言。
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Patent Agency Ranking
公开(公告)号：US20150200625A1
公开(公告)日：2015-07-16
申请号：US14152489
申请日：2014-01-10
Applicant: GOOGLE INC.
Inventor： Clemenz Portmann , Cheng-Yi Andrew Lin , Shahriar Rabii
IPC: H03B5/02
CPC classification number: H03B5/06 , H03B5/36 , H03B5/362 , H03B5/364 , H03B27/00 , H03B2200/0074 , H03L7/23 , H03L7/24
Abstract: A modulated signal based on a low-precision, fast startup oscillator is provided to a circuit with a high-precision, slow startup oscillator. The frequency of the modulated signal ranges around the characteristic or resonant frequency of the high precision oscillator without using feedback from the high precision oscillator circuit. An implementation can include one or more variable gain circuits that can be adjusted based on an amplitude threshold in relation to the output signal of the high precision oscillator circuit.
Abstract translation: 基于低精度，快速启动振荡器的调制信号被提供给具有高精度，慢启动振荡器的电路。 调制信号的频率围绕高精度振荡器的特性或谐振频率而不使用高精度振荡器电路的反馈。 实施方案可以包括可以基于相对于高精度振荡器电路的输出信号的幅度阈值来调整的一个或多个可变增益电路。
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公开(公告)号：US09484856B2
公开(公告)日：2016-11-01
申请号：US14152489
申请日：2014-01-10
Applicant: Google Inc.
Inventor： Clemenz Portmann , Cheng-Yi Andrew Lin , Shahriar Rabii
CPC classification number: H03B5/06 , H03B5/36 , H03B5/362 , H03B5/364 , H03B27/00 , H03B2200/0074 , H03L7/23 , H03L7/24
Abstract: A modulated signal based on a low-precision, fast startup oscillator is provided to a circuit with a high-precision, slow startup oscillator. The frequency of the modulated signal ranges around the characteristic or resonant frequency of the high precision oscillator without using feedback from the high precision oscillator circuit. An implementation can include one or more variable gain circuits that can be adjusted based on an amplitude threshold in relation to the output signal of the high precision oscillator circuit.
Abstract translation: 基于低精度，快速启动振荡器的调制信号被提供给具有高精度，慢启动振荡器的电路。 调制信号的频率围绕高精度振荡器的特性或谐振频率而不使用高精度振荡器电路的反馈。 实施方案可以包括可以基于相对于高精度振荡器电路的输出信号的幅度阈值来调整的一个或多个可变增益电路。
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公开(公告)号：US08779953B1
公开(公告)日：2014-07-15
申请号：US13955499
申请日：2013-07-31
Applicant: Google Inc.
Inventor： Clemenz Portmann , Shahriar Rabii , Donald Charles Stark
IPC: H03M1/10
Abstract: A method and device for testing a digital-to-analog converter is provided. The method may include configuring a decoder to address an individual unit cell of a plurality of unit cells of a digital-to-analog converter. The configured decoder may select a particular unit cell of the plurality of unit cells for testing. The selected unit cell may have digital and analog circuitry. A bias current of the selected unit cell may be increased. The increased bias current of the selected unit cell may be greater during the testing than during normal operation. A test logic signal may be applied to the selected unit cell. In response to the test logic signal, an output signal may be output from the selected unit cell logic circuitry of the digital-to-analog converter. A device may include logic circuitry configured to select an individual unit cell for testing and a current generating circuitry.
Abstract translation: 提供了一种用于测试数模转换器的方法和装置。 该方法可以包括配置解码器以寻址数模转换器的多个单位单元的单个单元。 配置的解码器可以选择多个单位单元中的特定单元以进行测试。 所选择的单元可以具有数字和模拟电路。 可以增加所选择的单元电池的偏置电流。 所选择的单元电池的增加的偏置电流在测试期间可能比在正常操作期间更大。 测试逻辑信号可以应用于所选择的单位单元。 响应于测试逻辑信号，输出信号可以从数模转换器的所选择的单元电路逻辑电路输出。 设备可以包括被配置为选择用于测试的单个单元单元的逻辑电路和当前生成电路。
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公开(公告)号：US20180330466A1
公开(公告)日：2018-11-15
申请号：US15595289
申请日：2017-05-15
Applicant: Google Inc.
Inventor： Fabrizio Basso , Edward Chang , Daniel Finchelstein , Timothy Knight , William Mark , Albert Meixner , Shahriar Rabii , Jason Redgrave , Masumi Reynders , Ofer Shacham , Don Stark , Michelle Tomasko
CPC classification number: G06T1/20 , G06K9/00221 , G06K9/00335 , G06K9/00624 , G06T3/4015 , H04N5/217 , H04N5/23232 , H04N5/23267
Abstract: An image processor unit is described. The image processor unit includes a plurality of inputs to receive at least one input image. The image processor unit includes a plurality of outputs to provide at least one output image. The image processor unit includes a network coupled to the plurality of inputs and the plurality of outputs. The network is to couple at least one of the inputs to at least one of the outputs. The image processor unit includes an image processor circuit coupled to the network. The network to route an input image that is received at one of the inputs to the image processor circuit. The image processor circuit is to execute image signal processing program code to generate a processed output image from the input image. The network is to route the processed output image to at least one of the outputs.
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公开(公告)号：US20140253177A1
公开(公告)日：2014-09-11
申请号：US14285660
申请日：2014-05-23
Applicant: Google Inc.
Inventor： Lynn Bos , Arnold Feldman , Shahriar Rabii
IPC: G11C27/02
CPC classification number: G11C27/028 , G11C27/02 , G11C27/024
Abstract: A circuit with a sampling network may include a pair of capacitors, where each of the capacitors has a first node and a second node; a first pair of switches communicatively coupling corresponding differential input voltage signals to the first node of each of the capacitors; and a second pair of switches communicatively coupling the second node of each of the capacitors to a common mode voltage source. Corresponding differential output voltage signals at the second node of each of the capacitors may be communicatively coupled using a differential switch. The second pair of switches may be coupled in parallel with the differential switch. A clock signal of the differential switch may be de-asserted prior to de-asserting corresponding clock signals for each of the second pair of switches.
Abstract translation: 具有采样网络的电路可以包括一对电容器，其中每个电容器具有第一节点和第二节点; 第一对开关，其将相应的差分输入电压信号通信耦合到每个电容器的第一节点; 以及第二对开关，其将每个电容器的第二节点通信地耦合到共模电压源。 每个电容器的第二节点处的对应差分输出电压信号可以使用差分开关通信耦合。 第二对开关可以与差动开关并联。 差分开关的时钟信号可以在对于第二对开关中的每一个的对应时钟信号解除置位之前被解除断言。
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