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    Multiple Gate Oxide Analog Circuit Architecture With Multiple Voltage Supplies and Associated Method
    1.
    发明申请
    Multiple Gate Oxide Analog Circuit Architecture With Multiple Voltage Supplies and Associated Method 审中-公开
    具有多电压电源和相关方法的多栅极氧化物模拟电路架构

    公开(公告)号：US20070120726A1

    公开(公告)日：2007-05-31

    申请号：US11535488

    申请日：2006-09-27

    申请人： HENRY TIN-HANG YUNG ,  CHAO-PING HUANG ,  STEVE WIYI YANG

    发明人： HENRY TIN-HANG YUNG ,  CHAO-PING HUANG ,  STEVE WIYI YANG

    IPC分类号： H03M1/38

    CPC分类号： H03M1/0695 ,  H03M1/168

    摘要： An analog circuit architecture with dual gate oxides and dual voltage supplies and associated method is provided. In the analog circuit architecture, different kinds of devices/transistors with different gate oxide thicknesses are powered by different voltages, such that advantages of each device technology are mixed to enhance total performance of the analog circuit. For example, thin gate oxide 0.18 um transistors are powered by 1.8V for high speed and low power consumption, whereas thick gate oxide 0.35 um transistors are powered by 3.3V for a wider signal swing range.

    摘要翻译： 提供了具有双栅极氧化物和双电压电源及相关方法的模拟电路架构。 在模拟电路架构中，具有不同栅极氧化物厚度的不同种类的器件/晶体管由不同的电压供电，从而混合每个器件技术的优点以增强模拟电路的总性能。 例如，薄栅极氧化物0.18μm晶体管由1.8V供电以实现高速度和低功耗，而厚栅极氧化层0.35μm晶体管由3.3V供电，用于更宽的信号摆幅范围。

    Dual Gate Oxide Analog Circuit Architecture With Dual Voltage Supplies and Associated Method
    2.
    发明申请
    Dual Gate Oxide Analog Circuit Architecture With Dual Voltage Supplies and Associated Method 有权
    双栅极氧化物模拟电路架构，采用双电压供电及相关方法

    公开(公告)号：US20090079604A1

    公开(公告)日：2009-03-26

    申请号：US12328770

    申请日：2008-12-05

    申请人： HENRY TIN-HANG YUNG ,  CHAO-PING HUANG ,  Steve Wiyi Yang

    发明人： HENRY TIN-HANG YUNG ,  CHAO-PING HUANG ,  Steve Wiyi Yang

    IPC分类号： H03M1/00

    CPC分类号： H03M1/0695 ,  H03M1/168

    摘要： An analog circuit architecture is fabricated with dual gate oxides and dual voltage supplies. In the analog circuit architecture, different kinds of devices/transistors with different gate oxide thicknesses are biased by different voltages, such that advantages of each device technology are mixed to enhance total performance of the analog circuit. For example, thin oxide 0.18 um transistors are biased at 1.8V for higher speed and lower power consumption, whereas thick oxide 0.35 um transistors are biased at 3.3V for a wider signal swing range.

    摘要翻译： 模拟电路架构采用双栅极氧化物和双电压电源制造。 在模拟电路架构中，具有不同栅极氧化物厚度的不同种类的器件/晶体管被不同的电压偏置，使得混合每个器件技术的优点以增强模拟电路的总性能。 例如，薄氧化物0.18μm晶体管被偏置在1.8V以实现更高的速度和更低的功耗，而厚的氧化物0.35μm晶体管被偏置在3.3V以获得更宽的信号摆幅范围。