公开(公告)号：US20240234338A1

公开(公告)日：2024-07-11

申请号：US18559516

申请日：2021-10-13

申请人： Mitsubishi Electric Corporation

发明人： Tetsunari SAITO ,  Seiichi TSUJI ,  Hiroaki MINAMIDE ,  Ko KANAYA ,  Shunichi ABE

IPC分类号： H01L23/552 ,  H01L23/00 ,  H01L23/48 ,  H01L23/498

CPC分类号： H01L23/552 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L23/481 ,  H01L2224/05553 ,  H01L2224/0557 ,  H01L2224/06152 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48157 ,  H01L2224/48245 ,  H01L2224/48476 ,  H01L2224/4911

摘要： An input feedthrough (8) and an output feedthrough (9) provided on the substrate (3) are wire-connected to an input pad (5) and an output pad (6) of the semiconductor chip (4) respectively. A metal seal ring (12) is provided on the substrate (3) is electrically connected to the metal plate (1) by a through-hole (15). A conductive cap (14) is bonded to the metal seal ring (12) and covers a place above the semiconductor chip (4). Both ends of an isolation metal wire (13) are electrically connected to the metal plate (1) and a loop comes into contact with a lower surface of the conductive cap (14). The isolation metal wire (13) constitutes an isolation wall partitioning an inner space into a region including the input feedthrough (8) and a region including the output feedthrough (9).

公开(公告)号：US12035471B2

公开(公告)日：2024-07-09

申请号：US17498761

申请日：2021-10-12

申请人： GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITED

发明人： Andu Zhou ,  Bingfeng Luo

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L23/52 ,  H01L29/40 ,  H05K1/11

CPC分类号： H05K1/111 ,  H01L24/05 ,  H01L24/06 ,  H01L24/49 ,  H01L2224/0603 ,  H01L2224/06132 ,  H01L2224/4903 ,  H01L2224/4911 ,  H01L2224/49175 ,  H01L2224/49421 ,  H01L2924/01029 ,  H01L2924/01079 ,  H05K2201/094

摘要： A circuit structure including a pad assembly, a bonding pad assembly, and a bonding assembly is provided. The pad assembly includes a first pad, a second pad, and a third pad which are separated from one another. The bonding pad assembly is located on one side of the pad assembly and includes a first bonding pad. The bonding assembly includes a first bonding wire, a second bonding wire, and a plurality of bonding members. The first bonding wire is connected to the first bonding pad and the first pad. The second bonding wire is connected to the first bonding pad and the third pad. The bonding members are connected among the first pad, the second pad, and the third pad. The circuit structure provided here may have an improved wire bonding efficiency and an increased distribution density of bonding points, and the number of bonding wires may be reduced.

公开(公告)号：US11848316B2

公开(公告)日：2023-12-19

申请号：US17886847

申请日：2022-08-12

申请人： Seoul Semiconductor Co., Ltd.

发明人： Motonobu Takeya ,  Young Hyun Kim

IPC分类号： H01L25/16 ,  H05B33/12 ,  H01L23/00 ,  H01L21/683 ,  H05B33/14 ,  H01L33/00 ,  H01L25/075 ,  H01L27/12 ,  H01L33/06 ,  H01L33/32 ,  H01L33/38 ,  H01L33/50 ,  H01L33/58 ,  H01L33/62 ,  H01L27/15 ,  H01L33/42 ,  H01L33/52 ,  H01L33/40 ,  G09G3/32

CPC分类号： H01L25/167 ,  H01L21/6835 ,  H01L24/19 ,  H01L24/97 ,  H01L25/0753 ,  H01L27/1214 ,  H01L33/0093 ,  H01L33/06 ,  H01L33/325 ,  H01L33/38 ,  H01L33/502 ,  H01L33/58 ,  H01L33/62 ,  H05B33/12 ,  H05B33/14 ,  G09G3/32 ,  G09G2300/04 ,  G09G2300/0452 ,  G09G2300/08 ,  H01L27/156 ,  H01L33/0095 ,  H01L33/405 ,  H01L33/42 ,  H01L33/504 ,  H01L33/507 ,  H01L33/52 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/68354 ,  H01L2221/68368 ,  H01L2224/45099 ,  H01L2224/4911 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2933/0066

摘要： A display apparatus including a panel substrate, and a light emitting source disposed on the panel substrate, in which the light emitting source includes a substrate, an electrode disposed on the substrate, a light emitting structure disposed on the electrode and having an n-type semiconductor layer, a p-type semiconductor layer, an n-type electrode, and a p-type electrode, a transparent electrode disposed on the light emitting structure, and an adhesive layer disposed on the light emitting structure, the n-type electrode is electrically connected to the electrode, the p-type electrode is electrically connected to the transparent electrode, and the adhesive layer is disposed between the p-type electrode and the transparent electrode.

公开(公告)号：US20230395566A1

公开(公告)日：2023-12-07

申请号：US17887372

申请日：2022-08-12

申请人： Micron Technology, Inc.

发明人： Vijayakrishna J. Vankayala

IPC分类号： H01L25/065 ,  H01L25/00 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L25/50 ,  H01L24/49 ,  H01L2224/49107 ,  H01L2224/4911 ,  H01L2224/49174 ,  H01L2224/49421 ,  H01L2924/1434

摘要： Systems, methods, and devices related to techniques for repeating inter-die signals within a multi-die package of a memory device are disclosed. The multi-die package includes a memory stack including a first memory die handling interfacing with a host for the package and at least one second memory die coupled to and configured to communicate with the first memory die via an inter-die connection. A technique involves incorporating the use of a multiplexer positioned in front of the transmitter of each die to facilitate repetition of inter-die signals within the memory stack as needed depending on various factors associated with the memory stack, such as, but not limited to, the type of signal, the intended recipient of the inter-die signals, and the stack height of the memory stack.

公开(公告)号：US20230387808A1

公开(公告)日：2023-11-30

申请号：US18345259

申请日：2023-06-30

申请人： Power Integrations, Inc.

发明人： Balu Balakrishnan ,  David Michael Hugh Matthews

IPC分类号： H02M3/335 ,  H01L23/495 ,  H01L23/00 ,  H01L23/552 ,  H02M7/00 ,  H01L23/48 ,  H01L23/28 ,  H01L23/31 ,  H01L23/58 ,  H01L25/065 ,  H01L25/18 ,  H04B5/00

CPC分类号： H02M3/33507 ,  H02M7/2176 ,  H01L24/48 ,  H01L24/49 ,  H01L23/552 ,  H02M3/33523 ,  H02M3/33592 ,  H01L23/49541 ,  H02M7/003 ,  H01L23/48 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/58 ,  H01L25/0655 ,  H01L25/18 ,  H04B5/0031 ,  H04B5/0081 ,  H01L2224/4911 ,  H01L2224/48465 ,  H01L2224/4903 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2924/19107 ,  H01L23/49575

摘要： An integrated circuit package includes a lead frame and an encapsulation that substantially encloses the lead frame. The lead frame further includes a first conductor comprising a first conductive loop and a second conductor galvanically isolated from the first conductor, proximate to and magnetically coupled to the first conductive loop to provide a communication link between the first and second conductor. The second conductor includes a first conductive portion, a second conductive portion, and a wire coupling together the first conductive portion and the second conductive portion.

公开(公告)号：US20230361073A1

公开(公告)日：2023-11-09

申请号：US17739415

申请日：2022-05-09

申请人： NANYA TECHNOLOGY CORPORATION

发明人： WU-DER YANG

IPC分类号： H01L23/00 ,  H01L23/13 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56

CPC分类号： H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L24/06 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L23/13 ,  H01L23/49827 ,  H01L23/3128 ,  H01L21/563 ,  H01L2224/73215 ,  H01L2224/92147 ,  H01L2224/9201 ,  H01L2224/9202 ,  H01L2224/92165 ,  H01L2224/3224 ,  H01L2224/33055 ,  H01L2224/3303 ,  H01L24/29 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29386 ,  H01L2224/06166 ,  H01L2224/4813 ,  H01L2224/4824 ,  H01L2224/4846 ,  H01L2224/48464 ,  H01L2224/48101 ,  H01L2224/48106 ,  H01L2224/48091 ,  H01L2224/49097 ,  H01L2224/49052 ,  H01L2224/4911 ,  H01L2224/49175 ,  H01L2924/15151 ,  H01L2924/15165 ,  H01L2924/15311

摘要： A method of manufacturing a WBGA package includes providing a carrier having a first surface and a second surface opposite to the first surface of the carrier, wherein the carrier has a through hole extending between the first surface and the second surface of the carrier; disposing an electronic component on the second surface of the carrier, wherein the electronic component includes a first bonding pad and a second bonding pad; and electrically connecting the first bonding pad and the second bonding pad through a first bonding wire.

公开(公告)号：US20180211938A1

公开(公告)日：2018-07-26

申请号：US15500138

申请日：2015-06-08

申请人： Hitachi Automotive Systems, Ltd.

发明人： Nobutake TSUYUNO ,  Junpei KUSUKAWA ,  Takeshi TOKUYAMA ,  Tokihito SUWA

IPC分类号： H01L25/07 ,  H01L23/367 ,  H01L23/373 ,  H01L23/495 ,  H02M7/00 ,  H02M7/537

CPC分类号： H01L25/072 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/3735 ,  H01L23/49575 ,  H01L23/5385 ,  H01L24/37 ,  H01L24/40 ,  H01L25/18 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/33 ,  H01L2224/37599 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19107 ,  H02M7/003 ,  H02M7/537 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/37099 ,  H01L2224/45099

摘要： It is an object of the present invention to provide a power module which can withstand a high voltage with a thin insulating layer. A power module of the present invention is provided with a first power semiconductor element 328 of an upper arm side constituting an inverter circuit, a second power semiconductor element 330 of a lower arm side, a first conductor part 320 which transmits an alternating current, a second conductor part 315 which transmits a direct current, an electrically-conductive heat dissipating part 307, a first intermediate conductor layer 910 disposed between the first conductor part 320 and the heat dissipating part 307 via an insulating layer 900, and a second intermediate conductor layer 911 disposed between the second conductor part 315 and the heat dissipating part 307 via the insulating layer 900, wherein, the second intermediate conductor layer 911 is formed to be separated from the first intermediate conductor layer 910, and the first intermediate conductor layer 910 forms a capacity circuit which shares the voltage between the first conductor part 320 and the heat dissipating part 307.

公开(公告)号：US10008488B2

公开(公告)日：2018-06-26

申请号：US15489031

申请日：2017-04-17

申请人： Samsung Electronics Co., Ltd.

发明人： Yongkwan Lee ,  Kundae Yeom ,  Jongho Lee ,  Hogeon Song

IPC分类号： H01L25/18 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L25/18 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16141 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/4911 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00012

摘要： In one embodiment, the semiconductor module includes a module substrate and a first substrate mounted on and electrically connected to a first surface of the module substrate. The first substrate has one or more first electrical connectors of the semiconductor module, and the first substrate electrically connecting the first electrical connector to the module substrate.

公开(公告)号：US09991227B2

公开(公告)日：2018-06-05

申请号：US15385988

申请日：2016-12-21

申请人： MediaTek Inc.

发明人： Hsing-Chih Liu ,  Chia-Hao Yang ,  Ying-Chih Chen

IPC分类号： H01L23/48 ,  H01L25/065 ,  H01L23/00

CPC分类号： H01L25/0655 ,  H01L23/49575 ,  H01L23/50 ,  H01L23/5221 ,  H01L23/528 ,  H01L23/5381 ,  H01L23/5386 ,  H01L24/05 ,  H01L24/06 ,  H01L24/09 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48138 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48479 ,  H01L2224/4903 ,  H01L2224/4909 ,  H01L2224/4911 ,  H01L2224/4912 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/4554

摘要： A semiconductor package structure includes a base. A first die is mounted on the base. The first die includes a plurality of first pads arranged in a first tier, and a plurality of second pads arranged in a second tier. A second die is mounted on the base and includes a plurality of third pads with the first pad area, and a plurality of fourth pads with the second pad area, alternately arranged in a third tier. The second die also includes a first bonding wire having two terminals respectively coupled to one of the first pads and one of the fourth pads. The semiconductor package structure also includes a second bonding wire having two terminals respectively coupled to one of the third pads and one of the second pads.

公开(公告)号：US20180145001A1

公开(公告)日：2018-05-24

申请号：US15876833

申请日：2018-01-22

申请人： Renesas Electronics Corporation

发明人： Toshihiko Akiba ,  Bunji Yasumura ,  Masanao Sato ,  Hiromi Abe

IPC分类号： H01L21/66 ,  H01L23/00

CPC分类号： H01L22/32 ,  G01R31/26 ,  H01L22/14 ,  H01L22/20 ,  H01L22/30 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/02313 ,  H01L2224/02371 ,  H01L2224/02373 ,  H01L2224/02381 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05012 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05187 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/06133 ,  H01L2224/06135 ,  H01L2224/10 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/4911 ,  H01L2224/49429 ,  H01L2224/49431 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85951 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/1306 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00012

摘要： Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.