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公开(公告)号:US20160103726A1
公开(公告)日:2016-04-14
申请号:US14894220
申请日:2013-05-31
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Melvin K. Benedict , Andrew C. Walton , Lidia Warnes
IPC: G06F11/07
CPC classification number: G06F11/079 , G06F3/0619 , G06F11/073 , G06F11/0751 , G06F11/076 , G06F11/0787 , G06F11/1004
Abstract: A technique includes accessing error information generated in response to memory errors of a memory device. The error information generated in response to the memory errors of the memory device may then be determined as indicative of a row hammer error for the memory device.
Abstract translation: 一种技术包括访问响应于存储器设备的存储器错误而生成的错误信息。 然后可以将响应于存储器件的存储器错误而产生的错误信息确定为指示存储器件的行锤错误。
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公开(公告)号:US20160085691A1
公开(公告)日:2016-03-24
申请号:US14778341
申请日:2013-03-28
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Melvin K. Benedict , William James Walker , Andrew C. Walton
CPC classification number: G06F12/123 , G06F12/0806 , G06F12/0888 , G06F12/0891 , G06F2212/1021 , G06F2212/1032 , G06F2212/22 , G06F2212/502 , G06F2212/604
Abstract: A technique includes monitoring activation rates of a plurality of memory locations associated with a plurality of memory addresses and regulating the activation rates. The regulating includes selectively updating a cache with the memory addresses based on the activation rates.
Abstract translation: 一种技术包括监视与多个存储器地址相关联的多个存储器位置的激活速率并调节激活速率。 调节包括基于激活速率选择性地更新具有存储器地址的高速缓存。
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