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公开(公告)号:US20080259070A1
公开(公告)日:2008-10-23
申请号:US11965520
申请日:2007-12-27
申请人: Warren Snyder , Harold Kutz , Timothy Williams , Bert Sullam , David Wright
发明人: Warren Snyder , Harold Kutz , Timothy Williams , Bert Sullam , David Wright
IPC分类号: G09G5/00
CPC分类号: H03K17/687 , H03K19/0016 , H03K19/00369
摘要: A liquid crystal display (LCD) driving system includes a reference voltage generator to generate a plurality of reference voltages. The LCD driving system also includes a plurality of drive buffers to generate drive voltages according to at least one of the reference voltages, and to drive at least a portion of a liquid crystal display to present data according to the drive voltages.
摘要翻译: 液晶显示器(LCD)驱动系统包括用于产生多个参考电压的参考电压发生器。 LCD驱动系统还包括多个驱动缓冲器,以根据至少一个参考电压产生驱动电压,并且驱动至少一部分液晶显示器以根据驱动电压呈现数据。
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公开(公告)号:US08686985B2
公开(公告)日:2014-04-01
申请号:US11965520
申请日:2007-12-27
申请人: Warren Snyder , Harold Kutz , Timothy Williams , Bert Sullam , David Wright
发明人: Warren Snyder , Harold Kutz , Timothy Williams , Bert Sullam , David Wright
IPC分类号: G09G5/00
CPC分类号: H03K17/687 , H03K19/0016 , H03K19/00369
摘要: A liquid crystal display (LCD) driving system includes a reference voltage generator to generate a plurality of reference voltages. The LCD driving system also includes a plurality of drive buffers to generate drive voltages according to at least one of the reference voltages, and to drive at least a portion of a liquid crystal display to present data according to the drive voltages.
摘要翻译: 液晶显示器(LCD)驱动系统包括用于产生多个参考电压的参考电压发生器。 LCD驱动系统还包括多个驱动缓冲器,以根据至少一个参考电压产生驱动电压,并且驱动至少一部分液晶显示器以根据驱动电压呈现数据。
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公开(公告)号:US08143934B1
公开(公告)日:2012-03-27
申请号:US12496580
申请日:2009-07-01
申请人: James H. Shutt , Harold Kutz , Timothy Williams , Bruce Byrkett
发明人: James H. Shutt , Harold Kutz , Timothy Williams , Bruce Byrkett
IPC分类号: H03K17/00
CPC分类号: H03K17/063 , H03K17/162 , H03K2017/066
摘要: A system includes a voltage pump to generate a first pump voltage from an analog voltage signal. The system further includes switching pad to receive an analog signal from an external source and route the analog signal to analog processing circuitry over one or more analog signal busses based on the first pump voltage and the analog voltage signal.
摘要翻译: 系统包括电压泵,以从模拟电压信号产生第一泵电压。 该系统还包括切换焊盘以从外部源接收模拟信号,并且基于第一泵浦电压和模拟电压信号将模拟信号路由到一个或多个模拟信号总线上的模拟处理电路。
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公开(公告)号:US08487655B1
公开(公告)日:2013-07-16
申请号:US12774680
申请日:2010-05-05
申请人: Harold Kutz , Timothy Williams , Bert Sullam , Warren S. Snyder , James Shutt , Bruce Byrkett , Monte Mar , Eashwar Thiagarajan , Nathan Kohagen , David G. Wright , Mark Hastings , Dennis Seguine
发明人: Harold Kutz , Timothy Williams , Bert Sullam , Warren S. Snyder , James Shutt , Bruce Byrkett , Monte Mar , Eashwar Thiagarajan , Nathan Kohagen , David G. Wright , Mark Hastings , Dennis Seguine
IPC分类号: H03K19/0175 , H03K19/094
CPC分类号: G01R31/3177 , G01R31/31721 , G06F13/28 , H03K19/173
摘要: A system and apparatus are described for providing greater flexibility and performance in a mixed-signal array through improved and highly configurable routing, control elements and signal processing capabilities.
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公开(公告)号:US08441303B1
公开(公告)日:2013-05-14
申请号:US13431801
申请日:2012-03-27
申请人: James H. Shutt , Harold Kutz , Timothy Williams , Bruce Byrkett
发明人: James H. Shutt , Harold Kutz , Timothy Williams , Bruce Byrkett
IPC分类号: H03K17/00
CPC分类号: H03K17/063 , H03K17/162 , H03K2017/066
摘要: A system includes a voltage pump to generate a first pump voltage from an analog voltage signal. The system further includes switching pad to receive an analog signal from an external source and route the analog signal to analog processing circuitry over one or more analog signal busses based on the first pump voltage and the analog voltage signal.
摘要翻译: 系统包括电压泵,以从模拟电压信号产生第一泵电压。 该系统还包括切换焊盘以从外部源接收模拟信号,并且基于第一泵浦电压和模拟电压信号将模拟信号路由到一个或多个模拟信号总线上的模拟处理电路。
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公开(公告)号:US07265595B1
公开(公告)日:2007-09-04
申请号:US11367139
申请日:2006-03-03
申请人: Harold Kutz , Timothy Williams , Morgan Whately
发明人: Harold Kutz , Timothy Williams , Morgan Whately
IPC分类号: H03L7/00
CPC分类号: G11C7/20 , G11C5/143 , G11C8/10 , H03K17/223 , H03K2217/0036
摘要: In one embodiment, an integrated circuit device includes a power on reset (POR) circuit and a stochastic reset circuit configured to control enabling and disabling of the POR circuit. The stochastic reset circuit may have a value from among many possible values. The POR circuit may be enabled during a power up sequence of the device when the value of the stochastic reset during the power up is not a value designated to allow disabling of the POR circuit. The stochastic reset circuit may be configured such that the probability of the POR circuit being disabled during the power up is extremely low. After the power up sequence, the stochastic reset circuit may be controlled to allow disabling of the POR circuit to conserve power.
摘要翻译: 在一个实施例中,集成电路器件包括上电复位(POR)电路和被配置为控制使能和禁止POR电路的随机复位电路。 随机复位电路可以具有许多可能值中的值。 当上电期间的随机复位值不是指定为允许禁止POR电路的值时,POR电路可以在器件的上电序列期间使能。 随机复位电路可以被配置为使得在上电期间POR电路被禁用的概率非常低。 在上电序列之后,可以控制随机复位电路以允许禁止POR电路以节省功率。
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公开(公告)号:US09612987B2
公开(公告)日:2017-04-04
申请号:US12776323
申请日:2010-05-07
申请人: Bert Sullam , Harold Kutz , Timothy Williams , James Shutt , Bruce E. Byrkett , Melany Ann Richmond , Nathan Kohagen , Mark Hastings , Eashwar Thiagarajan , Warren Snyder
发明人: Bert Sullam , Harold Kutz , Timothy Williams , James Shutt , Bruce E. Byrkett , Melany Ann Richmond , Nathan Kohagen , Mark Hastings , Eashwar Thiagarajan , Warren Snyder
CPC分类号: G06F13/4022 , G06F2213/0038
摘要: An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data.
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公开(公告)号:US08441298B1
公开(公告)日:2013-05-14
申请号:US12496579
申请日:2009-07-01
申请人: Timothy Williams , David G. Wright , Harold Kutz , Eashwar Thiagarajan , Warren Snyder , Mark E. Hastings
发明人: Timothy Williams , David G. Wright , Harold Kutz , Eashwar Thiagarajan , Warren Snyder , Mark E. Hastings
CPC分类号: G06F13/4022 , H03K19/1732
摘要: In one example, a chip includes an integrated analog component configured to communicate over an internal analog bus of the chip. A plurality of I/O pads located on the chip is configured to provide a connected device access to the integrated analog component. A plurality of transmission gates configured to selectively connect the I/O pads to a bus line of the analog bus.
摘要翻译: 在一个示例中,芯片包括被配置为通过芯片的内部模拟总线进行通信的集成模拟组件。 位于芯片上的多个I / O焊盘被配置为提供连接的器件对集成模拟部件的访问。 多个传输门被配置为选择性地将I / O焊盘连接到模拟总线的总线。
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公开(公告)号:US08217700B1
公开(公告)日:2012-07-10
申请号:US12496590
申请日:2009-07-01
申请人: Timothy Williams , Harold Kutz , Warren Snyder , David G. Wright
发明人: Timothy Williams , Harold Kutz , Warren Snyder , David G. Wright
IPC分类号: H03L5/00
CPC分类号: H03K19/1732
摘要: In one example, a chip includes integrated components configured to operate in the digital domain and the analog domain. An I/O pad located on the chip is configured to provide an external device access to the integrated components. A multifunction I/O interface cell between the I/O pad and the integrated components is configured to selectively connect different combinations of the components to the same I/O pad at different times. The multifunction I/O interface cell may include a first switching device connected to ground, a second switching device connected to a reference voltage, an analog input/output buffer, and a digital input/output buffer.
摘要翻译: 在一个示例中,芯片包括被配置为在数字域和模拟域中操作的集成组件。 位于芯片上的I / O焊盘被配置为提供对集成部件的外部设备访问。 I / O焊盘和集成组件之间的多功能I / O接口单元被配置为在不同时间有选择地将组件的不同组合连接到相同的I / O焊盘。 多功能I / O接口单元可以包括连接到地的第一开关器件,连接到参考电压的第二开关器件,模拟输入/输出缓冲器和数字输入/输出缓冲器。
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公开(公告)号:US20070205815A1
公开(公告)日:2007-09-06
申请号:US11367139
申请日:2006-03-03
申请人: Harold Kutz , Timothy Williams , Morgan Whately
发明人: Harold Kutz , Timothy Williams , Morgan Whately
IPC分类号: H03L7/00
CPC分类号: G11C7/20 , G11C5/143 , G11C8/10 , H03K17/223 , H03K2217/0036
摘要: In one embodiment, an integrated circuit device includes a power on reset (POR) circuit and a stochastic reset circuit configured to control enabling and disabling of the POR circuit. The stochastic reset circuit may have a value from among many possible values. The POR circuit may be enabled during a power up sequence of the device when the value of the stochastic reset during the power up is not a value designated to allow disabling of the POR circuit. The stochastic reset circuit may be configured such that the probability of the POR circuit being disabled during the power up is extremely low. After the power up sequence, the stochastic reset circuit may be controlled to allow disabling of the POR circuit to conserve power.
摘要翻译: 在一个实施例中,集成电路器件包括上电复位(POR)电路和被配置为控制使能和禁止POR电路的随机复位电路。 随机复位电路可以具有许多可能值中的值。 当上电期间的随机复位值不是指定为允许禁止POR电路的值时,POR电路可以在器件的上电序列期间使能。 随机复位电路可以被配置为使得在上电期间POR电路被禁用的概率非常低。 在上电序列之后,可以控制随机复位电路以允许禁止POR电路以节省功率。
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