公开(公告)号：US4694562A

公开(公告)日：1987-09-22

申请号：US925266

申请日：1986-10-31

申请人： Hiroshi Iwasaki ,  Shintaro Ito

发明人： Hiroshi Iwasaki ,  Shintaro Ito

IPC分类号： H01L21/8249 ,  H01L21/38

CPC分类号： H01L21/8249

摘要： A semiconductor integrated device (CBi-CMOS) is disclosed wherein both CMOS transistors and a vertical npn and pnp transistor are formed in a single semiconductor substrate and a latch up phenomenon in the CMOS is prevented. A method of manufacturing the CBi-CMOS is also disclosed. In the CBi-CMOS, four elements, that is, an n-MOSFET, a p-MOSFET and npn and pnp vertical transistors are formed in an n-type epitaxial silicon layer formed on a p-type silicon substrate. The n-MOSFET is formed in a p-well which has a p.sup.+ -type buried region. In the element region of the p-MOSFET, an n.sup.+ -type buried region is also formed. In the element regions of the npn and pnp vertical transistors, a first p.sup.+ -type isolation diffusion region is selectively formed. And an n.sup.+ -type buried region is selectively formed both in these element region of the npn and pnp vertical transistors. In the element region of the npn transistor, the vertical npn transistor is formed using the n-type region surrounded by the first p.sup.+ -type isolation diffusion region as a collector. In the element region of the pnp transistor, a p.sup.+ -type buried region is formed on the n.sup.+ -type buried region, and the vertical pnp transistor is formed using the p.sup.+ -type buried region as a collector. In this case, a second p.sup.+ -type isolation diffusion region is formed to isolate an n-type base region of the vertical pnp transistor.

摘要翻译： 公开了一种半导体集成器件（CBi-CMOS），其中在单个半导体衬底中形成CMOS晶体管和垂直npn和pnp晶体管，并且防止了CMOS中的闭锁现象。 还公开了制造CBi-CMOS的方法。 在CBi-CMOS中，在p型硅衬底上形成的n型外延硅层中形成四个元件，即n-MOSFET，p-MOSFET和npn和pnp垂直晶体管。 n-MOSFET形成在具有p +型掩埋区的p阱中。 在p-MOSFET的元件区域中，也形成n +型掩埋区域。 在npn和pnp垂直晶体管的元件区域中，选择性地形成第一p +型隔离扩散区域。 并且在npn和pnp垂直晶体管的这些元件区域中选择性地形成n +型掩埋区域。 在npn晶体管的元件区域中，使用由第一p +型隔离扩散区域包围的n型区域作为集电极形成垂直npn晶体管。 在pnp晶体管的元件区域中，在n +型掩埋区域上形成p +型掩埋区域，使用p +型掩埋区域作为集电体形成垂直pnp晶体管。 在这种情况下，形成第二p +型隔离扩散区，以隔离垂直pnp晶体管的n型基极区。

公开(公告)号：US4637125A

公开(公告)日：1987-01-20

申请号：US847150

申请日：1986-04-03

申请人： Hiroshi Iwasaki ,  Shintaro Ito

发明人： Hiroshi Iwasaki ,  Shintaro Ito

IPC分类号： H01L21/8249 ,  H01L21/38

CPC分类号： H01L21/8249

摘要： A semiconductor integrated device (CBi-CMOS) is disclosed wherein both CMOS transistors and a vertical npn and pnp transistor are formed in a single semiconductor substrate and a latch up phenomenon in the CMOS is prevented. A method of manufacturing the CBi-CMOS is also disclosed. In the CBi-CMOS, four elements, that is, an n-MOSFET, a p-MOSFET and npn and pnp vertical transistors are formed in an n-type epitaxial silicon layer formed on a p-type silicon substrate. The n-MOSFET is formed in a p-well which has a p.sup.+ -type buried region. In the element region of the p-MOSFET, an n.sup.+ -type buried region is also formed. In the element regions of the npn and pnp vertical transistors, a first p.sup.+ -type isolation diffusion region is selectively formed. An n.sup.+ -type buried region is selectively formed in both of these element region of the npn and pnp vertical transistors. In the element region of the npn transistor, the vertical npn transistor is formed using the n-type region surrounded by the first p.sup.+ -type isolation diffusion region as a collector. In the element region of the pnp transistor, a p.sup.+ -type buried region is formed on the n.sup.+ -type buried region, and the vertical pnp transistor is formed using the p.sup.+ -type buried region as a collector. In this case, a second p.sup.+ -type isolation diffusion region is formed to isolate an n-type base region of the vertical pnp transistor.

摘要翻译： 公开了一种半导体集成器件（CBi-CMOS），其中在单个半导体衬底中形成CMOS晶体管和垂直npn和pnp晶体管，并且防止了CMOS中的闭锁现象。 还公开了制造CBi-CMOS的方法。 在CBi-CMOS中，在p型硅衬底上形成的n型外延硅层中形成四个元件，即n-MOSFET，p-MOSFET和npn和pnp垂直晶体管。 n-MOSFET形成在具有p +型掩埋区的p阱中。 在p-MOSFET的元件区域中，也形成n +型掩埋区域。 在npn和pnp垂直晶体管的元件区域中，选择性地形成第一p +型隔离扩散区域。 在npn和pnp垂直晶体管的这些元件区域中选择性地形成n +型掩埋区域。 在npn晶体管的元件区域中，使用由第一p +型隔离扩散区域包围的n型区域作为集电极形成垂直npn晶体管。 在pnp晶体管的元件区域中，在n +型掩埋区域上形成p +型掩埋区域，使用p +型掩埋区域作为集电体形成垂直pnp晶体管。 在这种情况下，形成第二p +型隔离扩散区，以隔离垂直pnp晶体管的n型基极区。

公开(公告)号：US08484424B2

公开(公告)日：2013-07-09

申请号：US12338238

申请日：2008-12-18

申请人： Shintaro Ito ,  Norio Shimozono

发明人： Shintaro Ito ,  Norio Shimozono

IPC分类号： G06F12/00

CPC分类号： G06F12/084 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/0658 ,  G06F3/0689 ,  G06F12/0875 ,  G06F2212/3035 ,  G06F2212/466

摘要： There is provided a storage system including one or more LDEVs, one or more processors, a local memory or memories corresponding to the processor or processors, and a shared memory, which is shared by the processors, wherein control information on I/O processing or application processing is stored in the shared memory, and the processor caches a part of the control information in different storage areas on a type-by-type basis in the local memory or memories corresponding to the processor or processors in referring to the control information stored in the shared memory.

摘要翻译： 提供了包括一个或多个LDEV，一个或多个处理器，对应于处理器或处理器的本地存储器或存储器以及由处理器共享的共享存储器的存储系统，其中关于I / O处理的控制信息或 应用程序处理被存储在共享存储器中，并且处理器在参照所存储的控制信息的本地存储器或对应于处理器或存储器的存储器中逐个类型地将控制信息的一部分缓存在不同的存储区域中 在共享内存中。

公开(公告)号：US20120060010A1

公开(公告)日：2012-03-08

申请号：US13291408

申请日：2011-11-08

申请人： Norio Shimozono ,  Shintaro Ito

发明人： Norio Shimozono ,  Shintaro Ito

IPC分类号： G06F12/02

CPC分类号： G06F17/30067 ,  G06F17/3007 ,  G06F17/30079 ,  H04L49/253 ,  H04L49/30 ,  H04L49/50 ,  H04L49/501 ,  H04L49/70 ,  H04Q1/56

摘要： A switch unit, which is connected to one or more computers and one or more storage systems, comprises an update function for updating transfer management information (a routing table, for example). The storage system has a function for adding a virtual port to a physical port. The storage system migrates the virtual port addition destination from a first physical port to a second physical port and transmits a request of a predetermined type which includes identification information on the virtual port of the migration target to the switch unit. The transfer management information is updated by the update function of the switch unit so that the transfer destination which corresponds with the migration target virtual port is the switch port connected to the second physical port.

摘要翻译： 连接到一个或多个计算机和一个或多个存储系统的开关单元包括用于更新传送管理信息（例如路由表）的更新功能。 存储系统具有将虚拟端口添加到物理端口的功能。 存储系统将虚拟端口添加目的地从第一物理端口迁移到第二物理端口，并将包括迁移目标的虚拟端口上的标识信息的预定类型的请求发送到交换单元。 通过切换单元的更新功能来更新传送管理信息，使得与移动对象虚拟端口对应的传送目的地是连接到第二物理端口的交换端口。

公开(公告)号：US4337115A

公开(公告)日：1982-06-29

申请号：US137813

申请日：1980-04-04

申请人： Masashi Ikeda ,  Shintaro Ito

发明人： Masashi Ikeda ,  Shintaro Ito

IPC分类号： H01L21/306 ,  H01L21/027 ,  H01L21/28 ,  H01L21/768 ,  H01L23/485 ,  B05D5/12 ,  C23F1/02

CPC分类号： H01L21/7688 ,  H01L21/0272 ,  H01L23/4855 ,  H01L2924/0002 ,  Y10S438/944 ,  Y10S438/951

摘要： There is provided a method of forming an electrode on the surface of a semiconductor substrate which comprises the steps of(A) depositing on the surface of a semiconductor substrate an insulation layer provided with at least one opening for contact between the electrode and the semiconductor substrate;(B) coating a plurality of spacer layers made of insulation material on the surface of the insulation layer inclusive of the contact opening;(C) selectively depositing a photoresist layer on the uppermost are of said plural spacer layers, said uppermost spacer layer in direct contact with the photoresist layer being designed to be etched at a lower rate than the immediately underlying spacer layer;(D) using the photoresist layers as a mask to selectively etch the spacer layers until said opening is exposed;(E) depositing a metal layer on the surface of the semiconductor substrate inclusive of said opening and photoresist layer; and(F) removing the photoresist layer and the portions of the metal layer formed, such that the portion of the metal layer which is deposited on the surface of the semiconductor substrate exposed through the opening constitute the electrode, and the spacer layers remaining on the insulation layer form protective layers for the surface of the semiconductor substrate.

摘要翻译： 提供了一种在半导体衬底的表面上形成电极的方法，其包括以下步骤：（A）在半导体衬底的表面上沉积设置有至少一个用于接触电极和半导体衬底之间的开口的绝缘层 ; （B）在绝缘层的包括接触开口的表面上涂覆由绝缘材料制成的多个隔离层; （C）在所述多个间隔层的最上面选择性地沉积光致抗蚀剂层，与光致抗蚀剂层直接接触的所述最上层间隔层被设计为以比最接近的间隔层更低的速率进行蚀刻; （D）使用光致抗蚀剂层作为掩模来选择性地蚀刻间隔层，直到所述开口暴露; （E）在包括所述开口和光致抗蚀剂层的半导体衬底的表面上沉积金属层; 和（F）去除光致抗蚀剂层和形成的金属层的部分，使得沉积在通过开口暴露的半导体衬底的表面上的金属层的部分构成电极，并且间隔层保留在 绝缘层形成用于半导体衬底的表面的保护层。

公开(公告)号：US08291162B2

公开(公告)日：2012-10-16

申请号：US13234507

申请日：2011-09-16

申请人： Manabu Kitamura ,  Junji Ogawa ,  Shunji Kawamura ,  Takao Sato ,  Naoto Matsunami ,  Shintaro Ito ,  Tomohiro Yoshihara ,  Takuji Ogawa

发明人： Manabu Kitamura ,  Junji Ogawa ,  Shunji Kawamura ,  Takao Sato ,  Naoto Matsunami ,  Shintaro Ito ,  Tomohiro Yoshihara ,  Takuji Ogawa

IPC分类号： G06F12/16 ,  H03M13/11

CPC分类号： G06F11/1076 ,  G06F2211/1014

摘要： One code (a compressed redundant code) is created based on a plurality of first redundant codes, each created on the basis of a plurality of data units, and this compressed redundant code is written to a nonvolatile storage area. This compressed redundant code is used to restore either a data element constituting a multiple-failure data, or a first redundant code corresponding to the multiple-failure data, which is stored in an unreadable sub-storage area of a partially failed storage device, and to restore the data element constituting the multiple-failure data which is stored in a sub-storage area of a completely failed storage device, based on the restored either data element or first redundant code, and either another data element constituting the multiple-failure data or the first redundant code corresponding to the multiple-failure data.

摘要翻译： 基于多个基于多个数据单元创建的多个第一冗余代码来创建一个代码（压缩冗余代码），并将该压缩的冗余代码写入非易失性存储区域。 该压缩冗余代码用于恢复存储在部分故障存储设备的不可读子存储区域中的构成多故障数据的数据元素或对应于多故障数据的第一冗余代码，以及 基于恢复的数据元素或第一冗余代码，恢复存储在完全失败的存储设备的子存储区域中的构成多故障数据的数据元素，以及构成多故障数据的另一数据元素 或对应于多故障数据的第一冗余码。

公开(公告)号：US06471131B2

公开(公告)日：2002-10-29

申请号：US09795103

申请日：2001-03-01

申请人： Teruo Okada ,  Shintaro Ito

发明人： Teruo Okada ,  Shintaro Ito

IPC分类号： G06K1906

CPC分类号： G06K7/0021 ,  G06K7/0013

摘要： In a card socket (21-1) having a socket body (21) in which a memory card (10-1) is set and socket electrodes (22) formed on a bottom surface of the socket body (21) to be electrically contacted to exposed electrodes (12) of the memory card (10-1) when set into the card socket (21-1), the memory card (10-1) is magnetically contacted and fixed to the bottom surface of the socket body (21). The card socket (21-1) further has a card removal button (24) for releasing the memory card (10-1) from the card socket (21-1).

摘要翻译： 在具有设置有存储卡（10-1）的插座主体（21）的卡插座（21-1）中，形成在插座主体（21）的底面上的插座电极（22）被电接触 当设置到卡插槽（21-1）中时，将存储卡（10-1）的裸露电极（12）与存储卡（10-1）磁接触并固定到插座主体（21）的底表面 ）。 卡插座（21-1）还具有用于从卡插座（21-1）释放存储卡（10-1）的卡移除按钮（24）。

公开(公告)号：US08078690B2

公开(公告)日：2011-12-13

申请号：US12071897

申请日：2008-02-27

申请人： Norio Shimozono ,  Shintaro Ito

发明人： Norio Shimozono ,  Shintaro Ito

IPC分类号： G06F15/16

CPC分类号： G06F17/30067 ,  G06F17/3007 ,  G06F17/30079 ,  H04L49/253 ,  H04L49/30 ,  H04L49/50 ,  H04L49/501 ,  H04L49/70 ,  H04Q1/56

摘要： A switch unit, which is connected to one or more computers and one or more storage systems, comprises an update function for updating transfer management information (a routing table, for example). The storage system has a function for adding a virtual port to a physical port. The storage system migrates the virtual port addition destination from a first physical port to a second physical port and transmits a request of a predetermined type which includes identification information on the virtual port of the migration target to the switch unit. The transfer management information is updated by the update function of the switch unit so that the transfer destination which corresponds with the migration target virtual port is the switch port connected to the second physical port.

摘要翻译： 连接到一个或多个计算机和一个或多个存储系统的开关单元包括用于更新传送管理信息（例如路由表）的更新功能。 存储系统具有将虚拟端口添加到物理端口的功能。 存储系统将虚拟端口添加目的地从第一物理端口迁移到第二物理端口，并将包括迁移目标的虚拟端口上的标识信息的预定类型的请求发送到交换单元。 通过切换单元的更新功能来更新传送管理信息，使得与移动对象虚拟端口对应的传送目的地是连接到第二物理端口的交换端口。

公开(公告)号：US08037245B2

公开(公告)日：2011-10-11

申请号：US12026858

申请日：2008-02-06

申请人： Manabu Kitamura ,  Junji Ogawa ,  Shunji Kawamura ,  Takao Sato ,  Naoto Matsunami ,  Shintaro Ito ,  Tomohiro Yoshihara ,  Takuji Ogawa

发明人： Manabu Kitamura ,  Junji Ogawa ,  Shunji Kawamura ,  Takao Sato ,  Naoto Matsunami ,  Shintaro Ito ,  Tomohiro Yoshihara ,  Takuji Ogawa

IPC分类号： G06F12/16 ,  H03M13/11

CPC分类号： G06F11/1076 ,  G06F2211/1014

摘要： One code (a compressed redundant code) is created based on a plurality of first redundant codes, each created on the basis of a plurality of data units, and this compressed redundant code is written to a nonvolatile storage area. This compressed redundant code is used to restore either a data element constituting a multiple-failure data, or a first redundant code corresponding to the multiple-failure data, which is stored in an unreadable sub-storage area of a partially failed storage device, and to restore the data element constituting the multiple-failure data which is stored in a sub-storage area of a completely failed storage device, based on the restored either data element or first redundant code, and either another data element constituting the multiple-failure data or the first redundant code corresponding to the multiple-failure data.

摘要翻译： 基于多个基于多个数据单元创建的多个第一冗余代码来创建一个代码（压缩冗余代码），并将该压缩的冗余代码写入非易失性存储区域。 该压缩冗余代码用于恢复存储在部分故障存储设备的不可读子存储区域中的构成多故障数据的数据元素或对应于多故障数据的第一冗余代码，以及 基于恢复的数据元素或第一冗余代码，恢复存储在完全失败的存储设备的子存储区域中的构成多故障数据的数据元素，以及构成多故障数据的另一数据元素 或对应于多故障数据的第一冗余码。

公开(公告)号：US08937965B2

公开(公告)日：2015-01-20

申请号：US13291408

申请日：2011-11-08

申请人： Norio Shimozono ,  Shintaro Ito

发明人： Norio Shimozono ,  Shintaro Ito

IPC分类号： G01R31/08 ,  G06F11/00 ,  G08C15/00 ,  H04J1/16 ,  H04J3/14 ,  H04L1/00 ,  H04L12/28 ,  H04L12/56 ,  H04L12/54 ,  G06F15/16 ,  G06F15/177 ,  G06F13/00 ,  G06F13/28 ,  G06F17/30 ,  H04L12/937 ,  H04L12/931 ,  H04L12/935 ,  H04Q1/56

CPC分类号： G06F17/30067 ,  G06F17/3007 ,  G06F17/30079 ,  H04L49/253 ,  H04L49/30 ,  H04L49/50 ,  H04L49/501 ,  H04L49/70 ,  H04Q1/56

摘要： A switch unit, which is connected to one or more computers and one or more storage systems, comprises an update function for updating transfer management information (a routing table, for example). The storage system has a function for adding a virtual port to a physical port. The storage system migrates the virtual port addition destination from a first physical port to a second physical port and transmits a request of a predetermined type which includes identification information on the virtual port of the migration target to the switch unit. The transfer management information is updated by the update function of the switch unit so that the transfer destination which corresponds with the migration target virtual port is the switch port connected to the second physical port.