公开(公告)号：US20210134727A1

公开(公告)日：2021-05-06

申请号：US16473598

申请日：2017-03-30

Applicant: INTEL CORPORATION

Inventor： Robert A. May ,  Sri Ranga Sai BOYAPATI ,  Kristof DARMAWIKARTA ,  Hiroki TANAKA ,  Srinivas V. PIETAMBARAM ,  Frank TRUONG ,  Praneeth AKKINEPALLY ,  Andrew J. BROWN ,  Lauren A. LINK ,  Prithwish CHATTERJEE

IPC: H01L23/538 ,  H01L21/48

Abstract: An apparatus system is provided which comprises: a photoimageable dielectric layer; a first interconnect structure formed through the photoimageable dielectric, the first interconnect structure formed at least in part using a lithography process; and a second interconnect structure formed through the photoimageable dielectric, the second interconnect structure formed at least in part using a laser drilling process.

公开(公告)号：US20190389179A1

公开(公告)日：2019-12-26

申请号：US16480593

申请日：2017-03-17

Applicant: Intel Corporation

Inventor： Praneeth AKKINEPALLY ,  Frank TRUONG ,  Dilan SENEVIRATNE

IPC: B32B15/08 ,  B32B27/36 ,  B32B15/20 ,  B32B7/12 ,  C09J7/40

Abstract: Embodiments are generally directed to dielectric film with pressure sensitive microcapsules of adhesion promoter. An embodiment of an apparatus includes a dielectric film, the dielectric film including a dielectric material layer; a layer of pressure sensitive microcapsules on a first side of the dielectric material layer, the microcapsules including an adhesion promoter; and a cover material on the layer of microcapsules. The pressure sensitive microcapsules are to rupture upon application of a certain rupture pressure.

公开(公告)号：US20230187331A1

公开(公告)日：2023-06-15

申请号：US17549497

申请日：2021-12-13

Applicant: Intel Corporation

Inventor： Bainye Francoise ANGOUA ,  Chelsea GROVES ,  Frank TRUONG ,  Praneeth AKKINEPALLY ,  Whitney BRYKS

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/15

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49838 ,  H01L23/49866

Abstract: Embodiments herein relate to systems, apparatuses, or processes directed to a package that includes a glass core with one or more openings with one or more dies placed in the opening such that the glass core surrounds the one or more dies. One or one or more through glass via filled with conductive material such as copper electrically couple a first side of the glass core with a second side of the glass core opposite the first side. Other embodiments may be described and/or claimed.

公开(公告)号：US20210090981A1

公开(公告)日：2021-03-25

申请号：US16578704

申请日：2019-09-23

Applicant: Intel Corporation

Inventor： Praneeth AKKINEPALLY

IPC: H01L23/498 ,  H01L21/48

Abstract: Embodiments of the present disclosure may generally relate to systems, apparatus, and/or processes directed to a manufacturing process flow for a pad that is substantially surrounded by a surface finish such as ENEPIG. Embodiments may be directed to a pad that has a first side and a second side opposite the first side, a VIA that has a first end and a second end, where the first end of the VIA is coupled with at least a portion of the first side of the pad, and a surface finish directly coupled with and surrounding a surface of the pad that excludes the at least the portion of the first side of the pad.