公开(公告)号：US20160241249A1

公开(公告)日：2016-08-18

申请号：US15025226

申请日：2013-11-19

Applicant: INTEL CORPORATION

Inventor： Ganesh BALAMURUGAN ,  Mozhgan MANSURI ,  Sami HYVONEN ,  Bryan K. CASPER ,  Frank O'MAHONY

IPC: H03L7/00 ,  H04B1/04 ,  H03K5/156 ,  H04L25/03

CPC classification number: H03L7/00 ,  G11C7/1066 ,  G11C7/1093 ,  G11C7/22 ,  G11C7/222 ,  H03K5/1565 ,  H03L7/08 ,  H04B1/04 ,  H04L25/03

Abstract: Described is an apparatus which comprises: an asynchronous clock generator to generate an asynchronous clock signal; a digital sampler for sampling a signal using the asynchronous clock signal; a duty cycle corrector (DCC) to receive a differential input clock and to generate a differential output clock, wherein the digital sampler to sample at least one of an output clock from the differential output clock; and a counter to count output of the digital sampler and to provide a control to the DCC to adjust duty cycle of the differential output clock.

Abstract translation: 描述了一种装置，其包括：异步时钟发生器，用于产生异步时钟信号; 数字采样器，用于使用异步时钟信号对信号进行采样; 用于接收差分输入时钟并产生差分输出时钟的占空比校正器（DCC），其中所述数字采样器从所述差分输出时钟采样至少一个输出时钟; 以及计数器来计数数字采样器的输出，并向DCC提供控制以调整差分输出时钟的占空比。