公开(公告)号：US09916876B2

公开(公告)日：2018-03-13

申请号：US14336128

申请日：2014-07-21

Applicant: INTEL CORPORATION

Inventor： Suketu R. Partiwala ,  Prashanth Kalluraya ,  Bruce L. Fleming ,  Shreekant S. Thakkar ,  Kenneth D. Shoemaker ,  Sridhar Lakshmanamurthy ,  Sami Yehia ,  Joydeep Ray

IPC: G11C5/14 ,  G06F1/26 ,  G06F1/18 ,  G06F1/32

CPC classification number: G11C5/148 ,  G06F1/189 ,  G06F1/26 ,  G06F1/32 ,  G06F1/3275 ,  Y02D10/14

Abstract: An apparatus with an ultra low power architecture is described herein. The apparatus includes a first power supply rail, wherein a plurality of subsystems are to be powered by the first power supply rail. The apparatus also includes a second power supply rail, wherein a plurality of autonomous subsystems are to be powered by the power supply rail, wherein the second power supply rail is to be always on, always available, and low power.