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1.发明授权公开(公告)号：US11880669B2
公开(公告)日：2024-01-23
申请号：US17639809
申请日：2019-10-08
Applicant: Intel Corporation
Inventor： Shiyu Zhang , Junyong Ding , Tianyou Li , Mohammad R. Haghighat
CPC classification number: G06F8/443 , G06F8/437 , G06F8/458 , G06F9/4552
Abstract: Systems, apparatuses and methods may provide for technology that generates a first compiler output based on input code that includes dynamically typed variable information and generates a second compiler output based on the input code, wherein the second compiler output includes type check code to verify one or more type inferences associated with the first compiler output. The technology may also execute the first compiler output and the second compiler output in parallel via different threads.
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公开(公告)号：US20190132425A1
公开(公告)日：2019-05-02
申请号：US16095611
申请日：2016-05-23
Applicant: INTEL CORPORATION
Inventor： Tianyou Li , Shu Xu , Lei Zhai , Junyong Ding
Abstract: A method and apparatus for communicating between an open network video interface forum (ONVIF) device and an open interconnect consortium (OIC) device is provided. An example includes an ONVIF thrift server. The ONVIF thrift server includes an ONVIF communications subsystem, a network communication subsystem, an ONVIF registrar to discover an ONVIF device through the ONVIF communications subsystem, and a thrift server application programming interface (API) to communicate with an ONVIF/OIC server through the network communication subsystem.
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公开(公告)号：US11934809B2
公开(公告)日：2024-03-19
申请号：US17053531
申请日：2019-11-06
Applicant: Intel Corporation
Inventor： Junyong Ding , Mohammad Haghighat , Qi Zhang , Sebastian Winkel , Tianyou Li
IPC: G06F8/41
CPC classification number: G06F8/41
Abstract: Systems, apparatuses and methods may provide for developer stage technology that embeds binary code into an application binary file, wherein the binary code corresponds to vector functions and non-vector functions in statically typed source code, and generates intermediate representation (IR) data, wherein the intermediate representation data corresponds to the vector functions in the statically typed source code. Additionally, the developer stage technology embeds the IR data in the application binary file. Moreover, deployment stage technology may generate a first compilation output based on the application binary file and detect a capability change in an execution environment associated with the first compilation output. The deployment stage technology may also generate, in response to the detected capability change, a second compilation output based on the first compilation output.
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公开(公告)号：US10802979B2
公开(公告)日：2020-10-13
申请号：US16473588
申请日：2017-01-27
Applicant: Intel Corporation
Inventor： Shu Xu , Tianyou Li , Zidong Jiang , Weiliang Lion Lin , Jinkui Ren , Chaobo Zhu , Xiaokang Qin
IPC: G06F12/10 , G06F12/0891 , G06F12/06 , G06F12/0804 , G06F17/11
Abstract: Systems and techniques for dynamic code execution location in heterogeneous memory are described herein. In an system having a first class of memory and second class of memory that are both byte-addressable, an interpreter may be initialized to execute a program from the first class of memory. The initialization may include locating an Interpreter Routine Address Table (IRIT) in the second class of memory and creating counters for routines in the IRIT. A counter for a routine may be modified as it is referenced from the IRIT during execution. The routine may be moved from the first class of memory to the second class of memory in response to the counter passing a threshold. An entry in the IRIT for the routine may be updated with an address in the second class of memory corresponding to the routine.
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公开(公告)号：US11463273B2
公开(公告)日：2022-10-04
申请号：US17495426
申请日：2021-10-06
Applicant: Intel Corporation
Inventor： Tianyou Li , Christopher Elford , Qi Zhang , Junyong Ding , Shu Xu , Gang Shen , Hassnaa Moustafa
Abstract: This disclosure is directed to a universal interface for sensor devices. Applications executed in a device may interact with sensor devices via a universal interface. For example, the device may act as a gateway allowing Internet of Things (IoT) devices to interact with at least one resource external to the environment in which the IoT devices operate. The device may comprise at least memory circuitry to store at least a virtual file system and at least one application. The virtual file system may provide a programmatic interface through which at least one sensor device may be accessible to the at least one application. Processing circuitry in the device may execute an application from those stored within the memory circuitry. The application, when executed, may cause interconnect circuitry also in the device to at least one of transmit instructions to, or receive data from, a sensor device utilizing the virtual file system.
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Patent Agency Ranking
公开(公告)号：US20190324790A1
公开(公告)日：2019-10-24
申请号：US16469278
申请日：2016-12-16
Applicant: INTEL CORPORATION
Inventor： Tianyou Li , Shu Xu , Jinkui Ren , Zidong Jiang , Weiliang Lin , Chaobo Zhu , Yong Hu
Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.
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公开(公告)号：US20230102562A1
公开(公告)日：2023-03-30
申请号：US17053531
申请日：2019-11-06
Applicant: Intel Corporation
Inventor： Junyong Ding , Mohammad Haghighat , Qi Zhang , Sebastian Winkel , Tianyou Li
IPC: G06F8/41
Abstract: Systems, apparatuses and methods may provide for developer stage technology that embeds binary code into an application binary file, wherein the binary code corresponds to vector functions and non-vector functions in statically typed source code, and generates intermediate representation (IR) data, wherein the intermediate representation data corresponds to the vector functions in the statically typed source code. Additionally, the developer stage technology embeds the IR data in the application binary file. Moreover, deployment stage technology may generate a first compilation output based on the application binary file and detect a capability change in an execution environment associated with the first compilation output. The deployment stage technology may also generate, in response to the detected capability change, a second compilation output based on the first compilation output.
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公开(公告)号：US11385926B2
公开(公告)日：2022-07-12
申请号：US16478791
申请日：2017-02-17
Applicant: Intel Corporation
Inventor： Chao Xie , Jia Bao , Mingwei Shi , Yifan Zhang , Qiming Shi , Beiyuan Hu , Tianyou Li , Xiaokang Qin
IPC: G06F9/46 , G06F9/48 , G06F12/0802
Abstract: An application and system fast launch may provide a virtual memory address area (VMA) container to manage the restore of a context of a process, i.e., process context, saved in response to a checkpoint to enhance performance and to provide a resource efficient fast launch. More particularly, the fast launch may provide a way to manage, limit and/or delay the restore of a process context saved in response to a checkpoint, by generating a VMA container comprising VMA container pages, to restore physical memory pages following the checkpoint based on the most frequently used or predicted to be used. The application and system fast launch with the VMA container may avoid unnecessary input/output (I/O) bandwidth consumption, page faults and/or memory copy operations that may otherwise result from restoring the entire context of a VMA container without regard to frequency of use.
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公开(公告)号：US20220075639A1
公开(公告)日：2022-03-10
申请号：US17405857
申请日：2021-08-18
Applicant: Intel Corporation
Inventor： Tianyou Li , Shu Xu , Jinkui Ren , Zidong Jiang , Weiliang Lin , Chaobo Zhu , Yong Hu
Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.
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公开(公告)号：US11099879B2
公开(公告)日：2021-08-24
申请号：US16469278
申请日：2016-12-16
Applicant: INTEL CORPORATION
Inventor： Tianyou Li , Shu Xu , Jinkui Ren , Zidong Jiang , Weiliang Lin , Chaobo Zhu , Yong Hu
Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.
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