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公开(公告)号：US10802979B2
公开(公告)日：2020-10-13
申请号：US16473588
申请日：2017-01-27
Applicant: Intel Corporation
Inventor： Shu Xu , Tianyou Li , Zidong Jiang , Weiliang Lion Lin , Jinkui Ren , Chaobo Zhu , Xiaokang Qin
IPC: G06F12/10 , G06F12/0891 , G06F12/06 , G06F12/0804 , G06F17/11
Abstract: Systems and techniques for dynamic code execution location in heterogeneous memory are described herein. In an system having a first class of memory and second class of memory that are both byte-addressable, an interpreter may be initialized to execute a program from the first class of memory. The initialization may include locating an Interpreter Routine Address Table (IRIT) in the second class of memory and creating counters for routines in the IRIT. A counter for a routine may be modified as it is referenced from the IRIT during execution. The routine may be moved from the first class of memory to the second class of memory in response to the counter passing a threshold. An entry in the IRIT for the routine may be updated with an address in the second class of memory corresponding to the routine.
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公开(公告)号：US09798562B2
公开(公告)日：2017-10-24
申请号：US14778525
申请日：2014-09-26
Applicant: Intel Corporation
Inventor： Jinkui Ren , Dongxiao Xu , Xiantao Zhang
CPC classification number: G06F9/45541 , G06F9/452 , G06F9/45537 , G06F9/45558 , G06F9/5016 , G06F2009/45579 , G06F2009/45583
Abstract: Apparatuses, methods, and computer-readable media for buffer provision application (“BFA”) are described. The BPA may facilitate display of a guest application executing in a host operating system (“host OS”). The host OS may provide for execution of a guest application, such as through use of an emulator configured to emulate a guest OS environment. The BFA may provide a drawing buffer for use by the guest application. The drawing buffer may be caused to be allocated within the host OS by the BFA. The BFA may then cause the allocated buffer to be provided to the guest application so that the guest application may draw frame data directly to the drawing buffer. The BFA may then facilitate access to the drawing buffer by the host OS when compositing drawing buffer data with other drawing data of the host OS. Other embodiments may be described and claimed.
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公开(公告)号：US20140342715A1
公开(公告)日：2014-11-20
申请号：US13997462
申请日：2012-12-28
Applicant: INTEL CORPORATION
Inventor： Yang Gu , Le Chong Chen , Yong Jiang , Jinkui Ren
CPC classification number: H04W8/22 , G06F9/455 , H04B1/3816 , H04W8/205
Abstract: This disclosure is directed to systems and methods for implementing a virtualized subscriber module (SIM). In general, a device equipped with virtualization resources may be configured to load at least one virtualized SIM. Wireless communication resources in the device may be configured to access the at least one virtualized SIM when, for example, initializing a connection to a wireless network. Some embodiments may include more than one virtualized SIM. For example, a plurality of virtualized SIM may be loaded at the same time (e.g., for use in initializing connections to different wireless networks). In a different embodiment, a determination to be made as to which virtualized SIM to load based on, for example, the detection of available wireless networks. It may also be possible to load a single virtual machine (VM) to emulate various hardware-based SIMs based on, for example, varying information input into the virtual machine.
Abstract translation: 本公开涉及用于实现虚拟化订户模块（SIM）的系统和方法。 通常，配备有虚拟化资源的设备可以被配置为加载至少一个虚拟化SIM。 当例如初始化到无线网络的连接时，设备中的无线通信资源可以被配置为访问至少一个虚拟化的SIM。 一些实施例可以包括多于一个的虚拟化SIM。 例如，可以同时加载多个虚拟化SIM（例如，用于初始化到不同无线网络的连接）。 在不同的实施例中，基于例如可用无线网络的检测，确定要加载哪个虚拟化的SIM。 还可以加载单个虚拟机（VM）以基于例如输入虚拟机的变化信息来模拟各种基于硬件的SIM。
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公开(公告)号：US10782791B2
公开(公告)日：2020-09-22
申请号：US15777981
申请日：2015-12-22
Applicant: Intel Corporation
Inventor： Zhiqiang Liang , Tingqian Li , Jinkui Ren
IPC: G06F3/01 , G06F3/0346 , G06F3/038
Abstract: Systems and methods for recognizing a gesture in a wearable device are disclosed. The system may sense a plurality of sensor measurements during a gesture sensing session, and down-sample the measurements using an adaptive down-sampling interval. The adaptive down-sampling interval may be determined based at least on a fractional part of a ratio of a frame length of the sensor measurements to a specified target length shorter than the frame length. The magnitude of the down-sampled measurements is normalized, and a feature vector may be generated using the normalized measurements. A gesture recognizer module may associate a gesture with the feature vector using gesture classification.
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公开(公告)号：US10585489B2
公开(公告)日：2020-03-10
申请号：US15576493
申请日：2015-06-26
Applicant: INTEL CORPORATION
Inventor： Ke Han , Jinkui Ren , Xun Wang , Lili Ma
IPC: G06F3/033 , G06F3/01 , G06F3/0346 , G06F1/16
Abstract: Technologies for detecting micro-motion based input gestures include a wrist-wearable computing device that includes sensors from which values for micro-motion states can be determined. Each micro-motion state is indicative of a motion-related characteristic of the wrist-wearable computing device that is used to determine whether a sequence of detected gesture steps matches an input gesture model associated with an input gesture. The input gesture model defines a required sequence of required gesture steps from which an input gesture may be determined.
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Patent Agency Ranking
公开(公告)号：US20190324790A1
公开(公告)日：2019-10-24
申请号：US16469278
申请日：2016-12-16
Applicant: INTEL CORPORATION
Inventor： Tianyou Li , Shu Xu , Jinkui Ren , Zidong Jiang , Weiliang Lin , Chaobo Zhu , Yong Hu
Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.
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7.发明授权公开(公告)号：US10067777B2
公开(公告)日：2018-09-04
申请号：US14779237
申请日：2014-09-18
Applicant: INTEL CORPORATION
Inventor： Yao Zu Dong , Jinkui Ren
IPC: G06F9/455
Abstract: Multiple operating systems are supported on a computing device by disk virtualization technologies that allow switching between a native operating system and a virtualized guest operating system without performing a format conversion of the native operating system image, which is stored in a partition of a physical data storage device. The disk virtualization technologies establish a virtual storage device in a manner that allows the guest operating system to directly access the partition of the physical storage device that contains the native operating system image.
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公开(公告)号：US12067412B2
公开(公告)日：2024-08-20
申请号：US17405857
申请日：2021-08-18
Applicant: Intel Corporation
Inventor： Tianyou Li , Shu Xu , Jinkui Ren , Zidong Jiang , Weiliang Lin , Chaobo Zhu , Yong Hu
CPC classification number: G06F9/45558 , G06F9/3838 , G06F2009/45562
Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.
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公开(公告)号：US20200305735A1
公开(公告)日：2020-10-01
申请号：US16061616
申请日：2015-12-23
Applicant: INTEL CORPORATION
Inventor： Tingqian Li , Zhaohui Meng , Jinkui Ren
Abstract: Embodiments of a system and method for heart rate monitoring are generally described herein. A method may include receiving, at a device, a spectrogram including a plurality of bins of represented frequencies corresponding to potential heart rate measurements, selecting a bin of frequencies from the plurality of bins of represented frequencies with an average power that exceeds average powers of remaining bins of frequencies of the plurality of bins of represented frequencies, determining whether a frequency of the bin of frequencies represents a valid heart rate based on the average power and a past valid heart rate, and in response to determining that the frequency represents a valid heart rate, outputting a heart rate corresponding to the frequency.
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公开(公告)号：US20190332545A1
公开(公告)日：2019-10-31
申请号：US16473588
申请日：2017-01-27
Applicant: Intel Corporation
Inventor： Shu Xu , Tianyou Li , Zidong Jiang , Weiliang Lion Lin , Jinkui Ren , Chaobo Zhu , Xiaokang Qin
IPC: G06F12/0891 , G06F12/0804 , G06F12/06 , G06F17/11
Abstract: Systems and techniques for dynamic code execution location in heterogeneous memory are described herein. In an system having a first class of memory and second class of memory that are both byte-addressable, an interpreter may be initialized to execute a program from the first class of memory. The initialization may include locating an Interpreter Routine Address Table (IRIT) in the second class of memory and creating counters for routines in the IRIT. A counter for a routine may be modified as it is referenced from the IRIT during execution. The routine may be moved from the first class of memory to the second class of memory in response to the counter passing a threshold. An entry in the IRIT for the routine may be updated with an address in the second class of memory corresponding to the routine.
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