Universal interface for sensor devices

    公开(公告)号:US11463273B2

    公开(公告)日:2022-10-04

    申请号:US17495426

    申请日:2021-10-06

    Abstract: This disclosure is directed to a universal interface for sensor devices. Applications executed in a device may interact with sensor devices via a universal interface. For example, the device may act as a gateway allowing Internet of Things (IoT) devices to interact with at least one resource external to the environment in which the IoT devices operate. The device may comprise at least memory circuitry to store at least a virtual file system and at least one application. The virtual file system may provide a programmatic interface through which at least one sensor device may be accessible to the at least one application. Processing circuitry in the device may execute an application from those stored within the memory circuitry. The application, when executed, may cause interconnect circuitry also in the device to at least one of transmit instructions to, or receive data from, a sensor device utilizing the virtual file system.

    EXECUTING AN APPLICATION WITH MULTIPLE PROCESSORS

    公开(公告)号:US20190324790A1

    公开(公告)日:2019-10-24

    申请号:US16469278

    申请日:2016-12-16

    Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.

    INTERDEVICE COMMUNICATIONS
    3.
    发明申请

    公开(公告)号:US20190132425A1

    公开(公告)日:2019-05-02

    申请号:US16095611

    申请日:2016-05-23

    Abstract: A method and apparatus for communicating between an open network video interface forum (ONVIF) device and an open interconnect consortium (OIC) device is provided. An example includes an ONVIF thrift server. The ONVIF thrift server includes an ONVIF communications subsystem, a network communication subsystem, an ONVIF registrar to discover an ONVIF device through the ONVIF communications subsystem, and a thrift server application programming interface (API) to communicate with an ONVIF/OIC server through the network communication subsystem.

    Dynamic code execution location in heterogeneous memory

    公开(公告)号:US10802979B2

    公开(公告)日:2020-10-13

    申请号:US16473588

    申请日:2017-01-27

    Abstract: Systems and techniques for dynamic code execution location in heterogeneous memory are described herein. In an system having a first class of memory and second class of memory that are both byte-addressable, an interpreter may be initialized to execute a program from the first class of memory. The initialization may include locating an Interpreter Routine Address Table (IRIT) in the second class of memory and creating counters for routines in the IRIT. A counter for a routine may be modified as it is referenced from the IRIT during execution. The routine may be moved from the first class of memory to the second class of memory in response to the counter passing a threshold. An entry in the IRIT for the routine may be updated with an address in the second class of memory corresponding to the routine.

    EXECUTING AN APPLICATION WITH MULTIPLE PROCESSORS

    公开(公告)号:US20220075639A1

    公开(公告)日:2022-03-10

    申请号:US17405857

    申请日:2021-08-18

    Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.

    Executing an application with multiple processors

    公开(公告)号:US11099879B2

    公开(公告)日:2021-08-24

    申请号:US16469278

    申请日:2016-12-16

    Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.

    Technologies for pre-action execution

    公开(公告)号:US10362125B2

    公开(公告)日:2019-07-23

    申请号:US14779230

    申请日:2014-09-18

    Abstract: Technologies for pre-action execution include a client computing device to request a resource from a server and receive content from the server including the requested resource and one or more pre-action hints. Each of the one or more pre-action hints identifies a suggested pre-action to be taken by the client computing device prior to receipt of a corresponding user request to perform the corresponding suggested pre-action. The client computing device determines a likelihood of success of one or more pre-actions based on historical behavior data of a user of the client computing device, wherein each pre-action corresponds to at least one of the one or more pre-action hints. The client computing device selects a pre-action to execute based on the determined likelihood of success of the one or more pre-actions.

    Executing an application with multiple processors

    公开(公告)号:US12067412B2

    公开(公告)日:2024-08-20

    申请号:US17405857

    申请日:2021-08-18

    CPC classification number: G06F9/45558 G06F9/3838 G06F2009/45562

    Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.

    Technologies for cross-device shared web resource cache

    公开(公告)号:US12026218B2

    公开(公告)日:2024-07-02

    申请号:US18182087

    申请日:2023-03-10

    CPC classification number: G06F16/9574 G06F12/0811 G06F12/084 H04L67/568

    Abstract: Technologies for cross-device shared web resource caching include a client device and a shared cache device. The client device scans for a shared cache device in local proximity to the client device and, in response to the scan, registers with the shared cache device. After registering, the client device requests a cached web resource from the shared cache device. The shared cache device determines whether a cached web resource that matches the request is installed in a shared cache. The shared cache device may determine whether an origin of the request matches the origin of the cached web resource. If installed, the shared cache device sends a found response and the cached web resource to the client device. If not installed, the shared cache device sends a not-found response and the client device may request the web resource from a remote web server. Other embodiments are described and claimed.

    Technologies for cross-device shared web resource cache

    公开(公告)号:US11604848B2

    公开(公告)日:2023-03-14

    申请号:US17844518

    申请日:2022-06-20

    Abstract: Technologies for cross-device shared web resource caching include a client device and a shared cache device. The client device scans for a shared cache device in local proximity to the client device and, in response to the scan, registers with the shared cache device. After registering, the client device requests a cached web resource from the shared cache device. The shared cache device determines whether a cached web resource that matches the request is installed in a shared cache. The shared cache device may determine whether an origin of the request matches the mi gin of the cached web resource. If installed, the shared cache device sends a found response and the cached web resource to the client device. If not installed, the shared cache device sends a not-found response and the client device may request the web resource from a remote web server. Other embodiments are described and claimed.

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