公开(公告)号：US20230207412A1

公开(公告)日：2023-06-29

申请号：US17561432

申请日：2021-12-23

Applicant: Intel Corporation

Inventor： Ronald SPREITZER ,  Jason GARCIA ,  Ankur AGRAWAL ,  Eleanor Patricia Paras RABADAM ,  Guiyun BAI

IPC: H01L23/31 ,  H01L23/00 ,  B81C1/00 ,  H01L21/48 ,  H01L21/56 ,  B81B7/00 ,  H01S5/0234 ,  H01S5/50

CPC classification number: H01L23/3157 ,  H01L24/16 ,  B81C1/00301 ,  H01L21/4853 ,  H01L21/563 ,  B81B7/007 ,  H01S5/0234 ,  H01S5/50 ,  B81B2207/07 ,  H01L2924/146 ,  H01L2224/16227 ,  H01L2924/1461 ,  H01L2924/18161

Abstract: Example techniques to enable a flip chip underfill exclusion zone include use of bump barriers, films or etched substrate cavities to prevent underfill from reaching the flip chip underfill exclusion zone.

公开(公告)号：US20230318247A1

公开(公告)日：2023-10-05

申请号：US17710881

申请日：2022-03-31

Applicant: INTEL cORPORATION

Inventor： Eleanor Patricia Paras RABADAM ,  Guiyun BAI ,  Sanjeev GUPTA ,  Ronald SPREITZER ,  Jonathan DOYLEND ,  Ankur AGRAWAL ,  Boping XIE ,  Sushrutha Reddy GUJJULA ,  Jason GARCIA ,  Kenneth BROWN ,  Dan WANG ,  Daniel GRODENSKY ,  Israel PETRONIUS ,  Konstantin MATYUCH

IPC: H01S3/04

CPC classification number: H01S3/0405

Abstract: Embodiments herein relate to systems, apparatuses, or processes directed to a package that includes multiple PICs in the package that are optically coupled with each other. In embodiments, the package may include discrete electronic and optical components, and thermal management solutions for co-packaging of multiple PICs. Other embodiments may be described and/or claimed.